|
|
dae3b01ebc
|
Add work reference
|
2020-03-31 20:52:02 +02:00 |
|
|
|
2b4b735d40
|
Fix footnote hyperref links targetting last page
|
2020-03-31 16:23:55 +02:00 |
|
|
|
634ced8911
|
Merge branch 'waschtl' into merge-all
|
2020-03-31 14:44:11 +02:00 |
|
|
|
34bb2bfa4e
|
Add more temp files to gitignore
|
2020-03-31 14:43:08 +02:00 |
|
|
|
a5cb1acc97
|
Move FPGA development section to separate file
|
2020-03-31 14:40:29 +02:00 |
|
|
|
67808579e4
|
Add subsection about Free software to intro
|
2020-03-31 14:39:33 +02:00 |
|
|
|
d662561c36
|
Fix double instantiation of appendix package
|
2020-03-31 14:37:50 +02:00 |
|
|
|
87c678bbad
|
Rework SoC outline
|
2020-03-31 12:35:58 +02:00 |
|
|
|
a7f325489c
|
Language improvements
|
2020-03-31 12:33:08 +02:00 |
|
|
|
f9412ad437
|
Unify page numbering
|
2020-03-31 12:32:08 +02:00 |
|
|
|
1b7e6fad41
|
Remove more German
|
2020-03-31 12:31:33 +02:00 |
|
|
|
28abbf430e
|
More modifications
Signed-off-by: Tyrolyean <tyrolyean@tyrolyean.net>
|
2020-03-31 02:10:13 +02:00 |
|
|
|
e5744491ab
|
Remove German headings, unify numbering schemes
|
2020-03-31 00:51:35 +02:00 |
|
|
|
d9a7c973f5
|
Fix missing characters
|
2020-03-31 00:50:48 +02:00 |
|
|
|
15858dbd63
|
Update Makefile
|
2020-03-31 00:48:24 +02:00 |
|
|
|
6d09e50327
|
Merge remote-tracking branch 'iteasyndikat/batman_merge' into waschtl
Manual merge
Signed-off-by: Tyrolyean <tyrolyean@tyrolyean.net>
|
2020-03-30 23:51:15 +02:00 |
|
|
|
84b8effe40
|
Removed svg inkscape
Signed-off-by: Tyrolyean <tyrolyean@tyrolyean.net>
|
2020-03-30 23:43:04 +02:00 |
|
|
|
287fa0b7ee
|
Add info about SoC software
|
2020-03-30 23:39:46 +02:00 |
|
|
|
f4164ca3f2
|
Add info stub for SoC UART
|
2020-03-30 23:38:24 +02:00 |
|
|
|
637573fd43
|
Update core diagram
|
2020-03-30 23:38:10 +02:00 |
|
|
|
c15a3ec470
|
Improve phrasing
|
2020-03-30 20:56:18 +02:00 |
|
|
|
3e66e5d6c8
|
Add info about external bus clock speed
|
2020-03-30 20:55:43 +02:00 |
|
|
|
e86df5b9ba
|
Link to VHDL intro appendix
|
2020-03-30 20:54:36 +02:00 |
|
|
|
59299f196c
|
Cite VHDL's strong typing
|
2020-03-30 20:54:17 +02:00 |
|
|
|
1eaddf7d3d
|
Rework heading hierarchy
|
2020-03-30 15:20:53 +02:00 |
|
|
|
103a8e3d19
|
Turn VHDL introduction into appendix
|
2020-03-30 15:18:16 +02:00 |
|
|
|
8569677921
|
Merge remote-tracking branch 'iteasyndikat/batman_merge' into waschtl
Automerge of preample failed. Manually merged
Signed-off-by: Tyrolyean <tyrolyean@tyrolyean.net>
|
2020-03-30 14:50:13 +02:00 |
|
|
|
6c6323b3cc
|
MOAR STUFF
Signed-off-by: Tyrolyean <tyrolyean@tyrolyean.net>
|
2020-03-30 14:44:38 +02:00 |
|
|
|
3dc6bbf390
|
Misc fixes and improvements
|
2020-03-29 22:01:05 +02:00 |
|
|
|
ffb1fe4060
|
Add citations for GitLab CI and RISC-V spec
|
2020-03-29 21:58:14 +02:00 |
|
|
|
254a064680
|
Check all citation links and add urldate=
|
2020-03-29 21:57:24 +02:00 |
|
|
|
3b65229eae
|
Add information about formal verification
|
2020-03-29 19:03:49 +02:00 |
|
|
|
e891568008
|
Small fixes
|
2020-03-29 18:05:21 +02:00 |
|
|
|
40bc2327fd
|
Add information about DRAM interface
|
2020-03-29 18:05:05 +02:00 |
|
|
|
89f0a1565e
|
Improve FPGA comparison tables
|
2020-03-29 18:04:34 +02:00 |
|
|
|
239106c2fd
|
Add nbsp before citations
|
2020-03-29 18:03:16 +02:00 |
|
|
|
05617c9370
|
Fucked up main- in gitignore...
Signed-off-by: Tyrolyean <tyrolyean@tyrolyean.net>
|
2020-03-29 03:06:14 +02:00 |
|
|
|
a219bc2028
|
Added tikz externalize for faster compilation
Signed-off-by: Tyrolyean <tyrolyean@tyrolyean.net>
|
2020-03-29 03:04:38 +02:00 |
|
|
|
bdacd8347c
|
Added more parts to the DS
von neumann was a genius really...
Signed-off-by: Tyrolyean <tyrolyean@tyrolyean.net>
|
2020-03-29 00:03:46 +01:00 |
|
|
|
ac3b8e9d04
|
Merge remote-tracking branch 'iteasyndikat/batman_merge' into waschtl
|
2020-03-28 16:48:08 +01:00 |
|
|
|
ee6978f189
|
Cleanup!!
Signed-off-by: Tyrolyean <tyrolyean@tyrolyean.net>
|
2020-03-28 16:47:04 +01:00 |
|
|
|
647284c492
|
Re-added main.pdf... armin man. why? I use lfs for that
Signed-off-by: Tyrolyean <tyrolyean@tyrolyean.net>
|
2020-03-27 18:40:13 +01:00 |
|
|
|
dc77d4bf61
|
Add labels and captions to listings
|
2020-03-27 14:20:22 +01:00 |
|
|
|
af6338dbd3
|
Sanitized bibliography
Signed-off-by: Tyrolyean <tyrolyean@tyrolyean.net>
|
2020-03-27 13:00:18 +01:00 |
|
|
|
d1e846960c
|
Merge remote-tracking branch 'iteasyndikat/batman-release-20200327' into waschtl
Signed-off-by: Tyrolyean <tyrolyean@tyrolyean.net>
|
2020-03-27 12:58:29 +01:00 |
|
|
|
8492d24c27
|
Release batman-2020-03-27
|
2020-03-27 12:52:42 +01:00 |
|
|
|
ad723217ad
|
Add information about external bus
|
2020-03-27 12:50:24 +01:00 |
|
|
|
244380ee5f
|
Fix citations, change citation style
|
2020-03-27 12:49:50 +01:00 |
|
|
|
e65030ef47
|
Add information about riscv compliance tests
|
2020-03-27 12:49:38 +01:00 |
|
|
|
fe5fd915b8
|
FUCK
Signed-off-by: Tyrolyean <tyrolyean@tyrolyean.net>
|
2020-03-27 12:16:33 +01:00 |
|
