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88 Commits

Author SHA1 Message Date
Tyrolyean d620d39bdf
FINAL COMMIT 
This commit concludes the development phase of this thesis as the deadline set
in 10 hours from now comes closer and closer and I want to sleep at one point
as well. Probably not gonna be awake until then. Either this is going out well
one way or the other we will see... FUCK COMMIT MESSAGES!

Signed-off-by: Tyrolyean <tyrolyean@tyrolyean.net>
 2020-04-01 02:37:52 +02:00
Tyrolyean 9fadf57f82
Merge remote-tracking branch 'iteasyndikat/batman' into merge-all 
Manual merge at work time reference

Signed-off-by: Tyrolyean <tyrolyean@tyrolyean.net>
 2020-03-31 23:46:16 +02:00
Tyrolyean 510a6149d1
Added corrections at last minute 
Signed-off-by: Tyrolyean <tyrolyean@tyrolyean.net>
 2020-03-31 23:45:03 +02:00
Xiretza 24c636e82a
Fix work reference 2020-03-31 23:37:40 +02:00
Tyrolyean e0cdacd1da
Re-compiled 
Signed-off-by: Tyrolyean <tyrolyean@tyrolyean.net>
 2020-03-31 21:02:42 +02:00
Tyrolyean 368c33cdb8
Merge remote-tracking branch 'iteasyndikat/batman' into merge-all 2020-03-31 21:02:07 +02:00
Tyrolyean b8f0eab401
Moved subpages 
Signed-off-by: Tyrolyean <tyrolyean@tyrolyean.net>
 2020-03-31 21:01:35 +02:00
Xiretza 99e164ed08
Don't depend on YARM repo in Makefile 2020-03-31 21:00:15 +02:00
Xiretza dae3b01ebc
Add work reference 2020-03-31 20:52:02 +02:00
Xiretza 2b4b735d40
Fix footnote hyperref links targetting last page 2020-03-31 16:23:55 +02:00
Xiretza 634ced8911
Merge branch 'waschtl' into merge-all 2020-03-31 14:44:11 +02:00
Xiretza 34bb2bfa4e
Add more temp files to gitignore 2020-03-31 14:43:08 +02:00
Xiretza a5cb1acc97
Move FPGA development section to separate file 2020-03-31 14:40:29 +02:00
Xiretza 67808579e4
Add subsection about Free software to intro 2020-03-31 14:39:33 +02:00
Xiretza d662561c36
Fix double instantiation of appendix package 2020-03-31 14:37:50 +02:00
Xiretza 87c678bbad
Rework SoC outline 2020-03-31 12:35:58 +02:00
Xiretza a7f325489c
Language improvements 2020-03-31 12:33:08 +02:00
Xiretza f9412ad437
Unify page numbering 2020-03-31 12:32:08 +02:00
Xiretza 1b7e6fad41
Remove more German 2020-03-31 12:31:33 +02:00
Tyrolyean 28abbf430e
More modifications 
Signed-off-by: Tyrolyean <tyrolyean@tyrolyean.net>
 2020-03-31 02:10:13 +02:00
Xiretza e5744491ab
Remove German headings, unify numbering schemes 2020-03-31 00:51:35 +02:00
Xiretza d9a7c973f5
Fix missing characters 2020-03-31 00:50:48 +02:00
Xiretza 15858dbd63
Update Makefile 2020-03-31 00:48:24 +02:00
Tyrolyean 6d09e50327
Merge remote-tracking branch 'iteasyndikat/batman_merge' into waschtl 
Manual merge

Signed-off-by: Tyrolyean <tyrolyean@tyrolyean.net>
 2020-03-30 23:51:15 +02:00
Tyrolyean 84b8effe40
Removed svg inkscape 
Signed-off-by: Tyrolyean <tyrolyean@tyrolyean.net>
 2020-03-30 23:43:04 +02:00
Xiretza 287fa0b7ee
Add info about SoC software 2020-03-30 23:39:46 +02:00
Xiretza f4164ca3f2
Add info stub for SoC UART 2020-03-30 23:38:24 +02:00
Xiretza 637573fd43
Update core diagram 2020-03-30 23:38:10 +02:00
Xiretza c15a3ec470
Improve phrasing 2020-03-30 20:56:18 +02:00
Xiretza 3e66e5d6c8
Add info about external bus clock speed 2020-03-30 20:55:43 +02:00
Xiretza e86df5b9ba
Link to VHDL intro appendix 2020-03-30 20:54:36 +02:00
Xiretza 59299f196c
Cite VHDL's strong typing 2020-03-30 20:54:17 +02:00
Xiretza 1eaddf7d3d
Rework heading hierarchy 2020-03-30 15:20:53 +02:00
Xiretza 103a8e3d19
Turn VHDL introduction into appendix 2020-03-30 15:18:16 +02:00
Tyrolyean 8569677921
Merge remote-tracking branch 'iteasyndikat/batman_merge' into waschtl 
Automerge of preample failed. Manually merged

Signed-off-by: Tyrolyean <tyrolyean@tyrolyean.net>
 2020-03-30 14:50:13 +02:00
Tyrolyean 6c6323b3cc
MOAR STUFF 
Signed-off-by: Tyrolyean <tyrolyean@tyrolyean.net>
 2020-03-30 14:44:38 +02:00
Xiretza 3dc6bbf390
Misc fixes and improvements 2020-03-29 22:01:05 +02:00
Xiretza ffb1fe4060
Add citations for GitLab CI and RISC-V spec 2020-03-29 21:58:14 +02:00
Xiretza 254a064680
Check all citation links and add urldate= 2020-03-29 21:57:24 +02:00
Xiretza 3b65229eae
Add information about formal verification 2020-03-29 19:03:49 +02:00
Xiretza e891568008
Small fixes 2020-03-29 18:05:21 +02:00
Xiretza 40bc2327fd
Add information about DRAM interface 2020-03-29 18:05:05 +02:00
Xiretza 89f0a1565e
Improve FPGA comparison tables 2020-03-29 18:04:34 +02:00
Xiretza 239106c2fd
Add nbsp before citations 2020-03-29 18:03:16 +02:00
Tyrolyean 05617c9370
Fucked up main- in gitignore... 
Signed-off-by: Tyrolyean <tyrolyean@tyrolyean.net>
 2020-03-29 03:06:14 +02:00
Tyrolyean a219bc2028
Added tikz externalize for faster compilation 
Signed-off-by: Tyrolyean <tyrolyean@tyrolyean.net>
 2020-03-29 03:04:38 +02:00
Tyrolyean bdacd8347c
Added more parts to the DS 
von neumann was a genius really...

Signed-off-by: Tyrolyean <tyrolyean@tyrolyean.net>
 2020-03-29 00:03:46 +01:00
Tyrolyean ac3b8e9d04
Merge remote-tracking branch 'iteasyndikat/batman_merge' into waschtl 2020-03-28 16:48:08 +01:00
Tyrolyean ee6978f189
Cleanup!! 
Signed-off-by: Tyrolyean <tyrolyean@tyrolyean.net>
 2020-03-28 16:47:04 +01:00
Tyrolyean 647284c492
Re-added main.pdf... armin man. why? I use lfs for that 
Signed-off-by: Tyrolyean <tyrolyean@tyrolyean.net>
 2020-03-27 18:40:13 +01:00