xiretza
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  • Joined on 2018-10-02
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xiretza pushed to main at xiretza/aoc2020 2020-12-01 16:51:04 +01:00
364261047d day1: modify python for part2
2a315e81e1 day1: add python part1
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xiretza pushed to main at xiretza/aoc2020 2020-12-01 16:29:28 +01:00
2d47813106 Add README.md
xiretza created repository xiretza/aoc2020 2020-12-01 16:26:48 +01:00
xiretza pushed to batman at tyrolyean/dipl 2020-03-31 23:37:56 +02:00
24c636e82a Fix work reference
e0cdacd1da Re-compiled
368c33cdb8 Merge remote-tracking branch 'iteasyndikat/batman' into merge-all
b8f0eab401 Moved subpages
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xiretza pushed to batman at tyrolyean/dipl 2020-03-31 21:00:41 +02:00
99e164ed08 Don't depend on YARM repo in Makefile
xiretza pushed to batman at tyrolyean/dipl 2020-03-31 20:52:21 +02:00
dae3b01ebc Add work reference
xiretza pushed to batman at tyrolyean/dipl 2020-03-31 16:24:21 +02:00
2b4b735d40 Fix footnote hyperref links targetting last page
634ced8911 Merge branch 'waschtl' into merge-all
28abbf430e More modifications
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xiretza pushed to merge-all at tyrolyean/dipl 2020-03-31 14:45:57 +02:00
634ced8911 Merge branch 'waschtl' into merge-all
34bb2bfa4e Add more temp files to gitignore
a5cb1acc97 Move FPGA development section to separate file
67808579e4 Add subsection about Free software to intro
d662561c36 Fix double instantiation of appendix package
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xiretza pushed to batman at tyrolyean/dipl 2020-03-31 14:43:21 +02:00
34bb2bfa4e Add more temp files to gitignore
xiretza pushed to batman at tyrolyean/dipl 2020-03-31 14:40:54 +02:00
a5cb1acc97 Move FPGA development section to separate file
67808579e4 Add subsection about Free software to intro
d662561c36 Fix double instantiation of appendix package
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xiretza pushed to batman at tyrolyean/dipl 2020-03-31 12:36:38 +02:00
87c678bbad Rework SoC outline
xiretza deleted branch batman_merge from tyrolyean/dipl 2020-03-31 12:34:21 +02:00
xiretza pushed to batman at tyrolyean/dipl 2020-03-31 12:33:53 +02:00
a7f325489c Language improvements
f9412ad437 Unify page numbering
1b7e6fad41 Remove more German
e5744491ab Remove German headings, unify numbering schemes
d9a7c973f5 Fix missing characters
xiretza pushed to merge-all at tyrolyean/dipl 2020-03-31 00:08:49 +02:00
xiretza pushed to batman_merge at tyrolyean/dipl 2020-03-30 23:39:54 +02:00
287fa0b7ee Add info about SoC software
f4164ca3f2 Add info stub for SoC UART
637573fd43 Update core diagram
c15a3ec470 Improve phrasing
3e66e5d6c8 Add info about external bus clock speed
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xiretza pushed to batman_merge at tyrolyean/dipl 2020-03-29 22:01:25 +02:00
3dc6bbf390 Misc fixes and improvements
ffb1fe4060 Add citations for GitLab CI and RISC-V spec
254a064680 Check all citation links and add urldate=
3b65229eae Add information about formal verification
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xiretza pushed to batman_merge at tyrolyean/dipl 2020-03-29 18:06:41 +02:00
e891568008 Small fixes
40bc2327fd Add information about DRAM interface
89f0a1565e Improve FPGA comparison tables
239106c2fd Add nbsp before citations
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xiretza pushed to batman_merge at tyrolyean/dipl 2020-03-27 14:20:34 +01:00
dc77d4bf61 Add labels and captions to listings
xiretza pushed to batman-release-20200327 at tyrolyean/dipl 2020-03-27 12:52:47 +01:00
8492d24c27 Release batman-2020-03-27
9c10840346 Releas batman-2020-03-27
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xiretza pushed to batman-release-20200327 at tyrolyean/dipl 2020-03-27 12:51:57 +01:00
9c10840346 Releas batman-2020-03-27