vhdl: rename NUM_DRIVERS to NUM_STRANDS

This commit is contained in:
Xiretza 2022-06-05 16:51:03 +02:00
parent 2ec250e79d
commit d5b0ee2cfa
2 changed files with 5 additions and 5 deletions

View file

@ -46,8 +46,8 @@ entity arty_a7 is
end arty_a7; end arty_a7;
architecture a of arty_a7 is architecture a of arty_a7 is
constant NUM_DRIVERS: positive := 24; constant NUM_STRANDS: positive := 24;
signal drivers: std_logic_vector(NUM_DRIVERS-1 downto 0); signal drivers: std_logic_vector(NUM_STRANDS-1 downto 0);
component liteeth_core is component liteeth_core is
port ( port (
@ -317,7 +317,7 @@ begin
splink: entity work.splink splink: entity work.splink
generic map ( generic map (
NUM_DRIVERS => NUM_DRIVERS NUM_STRANDS => NUM_STRANDS
) )
port map ( port map (
clk => sys_clk, clk => sys_clk,

View file

@ -4,14 +4,14 @@ use ieee.numeric_std.all;
entity splink is entity splink is
generic ( generic (
NUM_DRIVERS : positive; NUM_STRANDS : positive;
MAX_STRAND_LEN : positive := 256 MAX_STRAND_LEN : positive := 256
); );
port ( port (
clk : in std_logic; clk : in std_logic;
reset : in std_logic; reset : in std_logic;
drivers : out std_logic_vector(NUM_DRIVERS-1 downto 0) drivers : out std_logic_vector(NUM_STRANDS-1 downto 0)
); );
end entity; end entity;