\@writefile{lof}{\contentsline{figure}{\numberline{iii}{\ignorespaces Layout of the DIN41612 Connectors on the Backplane\relax}}{6}{figure.caption.3}\protected@file@percent }
\newlabel{fig:schem_back_conn}{{iii}{6}{Layout of the DIN41612 Connectors on the Backplane\relax}{figure.caption.3}{}}
\@writefile{lof}{\contentsline{figure}{\numberline{iv}{\ignorespaces Measurement at around 1MHz bus clock on MS1\relax}}{7}{figure.caption.4}\protected@file@percent }
\newlabel{fig:reflex}{{iv}{7}{Measurement at around 1MHz bus clock on MS1\relax}{figure.caption.4}{}}
\@writefile{lof}{\contentsline{figure}{\numberline{v}{\ignorespaces The case with installed backplane\relax}}{8}{figure.caption.5}\protected@file@percent }
\newlabel{fig:case}{{v}{8}{The case with installed backplane\relax}{figure.caption.5}{}}
\@writefile{lof}{\contentsline{figure}{\numberline{vii}{\ignorespaces The schematic of the UART Module\relax}}{11}{figure.caption.7}\protected@file@percent }
\newlabel{fig:schem_uart}{{vii}{11}{The schematic of the UART Module\relax}{figure.caption.7}{}}
\@writefile{lof}{\contentsline{figure}{\numberline{viii}{\ignorespaces Measurement of the 1.8432 MHz Output on J1\relax}}{12}{figure.caption.8}\protected@file@percent }
\newlabel{fig:uartquartz}{{viii}{12}{Measurement of the 1.8432 MHz Output on J1\relax}{figure.caption.8}{}}
\@writefile{lof}{\contentsline{figure}{\numberline{ix}{\ignorespaces Measurement of a character transmission before and after MAX-232\relax}}{13}{figure.caption.9}\protected@file@percent }
\newlabel{fig:uart232}{{ix}{13}{Measurement of a character transmission before and after MAX-232\relax}{figure.caption.9}{}}
\@writefile{lof}{\contentsline{figure}{\numberline{x}{\ignorespaces Pinout of the RJ-45 Plug; Src: \url{https://www.wti.com/}\relax}}{13}{figure.caption.10}\protected@file@percent }
\newlabel{fig:rs232rj45}{{x}{13}{Pinout of the RJ-45 Plug; Src: \url{https://www.wti.com/}\relax}{figure.caption.10}{}}
\@writefile{lof}{\contentsline{figure}{\numberline{xi}{\ignorespaces Measurement of a character echo\relax}}{14}{figure.caption.11}\protected@file@percent }
\newlabel{fig:232_echo}{{xi}{14}{Measurement of a character echo\relax}{figure.caption.11}{}}
\newlabel{lst:16550-transmit}{{II}{16}{16550 INIT routines and single char transmission}{lstlisting.2}{}}
\@writefile{lol}{\contentsline{lstlisting}{\numberline{II}16550 INIT routines and single char transmission}{16}{lstlisting.2}\protected@file@percent }
\@writefile{lof}{\contentsline{figure}{\numberline{xii}{\ignorespaces Transmission of character A via the 16550 UART\relax}}{17}{figure.caption.12}\protected@file@percent }
\newlabel{fig:16550A}{{xii}{17}{Transmission of character A via the 16550 UART\relax}{figure.caption.12}{}}
\@writefile{lof}{\contentsline{figure}{\numberline{xv}{\ignorespaces TLC-7528 in voltage modet\cite{tlc7528}\relax}}{21}{figure.caption.15}\protected@file@percent }
\newlabel{fig:tlc7528_volt}{{xv}{21}{TLC-7528 in voltage modet\cite{tlc7528}\relax}{figure.caption.15}{}}
\@writefile{lof}{\contentsline{figure}{\numberline{xvi}{\ignorespaces Measurement of a generated SAW signal via the TLC7528\relax}}{21}{figure.caption.16}\protected@file@percent }
\newlabel{fig:tlc7528_saw_nonlin}{{xvi}{21}{Measurement of a generated SAW signal via the TLC7528\relax}{figure.caption.16}{}}
\@writefile{lof}{\contentsline{figure}{\numberline{xvii}{\ignorespaces The schematic of the DAC Module\relax}}{22}{figure.caption.17}\protected@file@percent }
\newlabel{fig:schem_dac}{{xvii}{22}{The schematic of the DAC Module\relax}{figure.caption.17}{}}
\@writefile{lof}{\contentsline{figure}{\numberline{xviii}{\ignorespaces Measurement of a generated SAW signal with the FIFO Empty flag\relax}}{24}{figure.caption.18}\protected@file@percent }
\newlabel{fig:tlc7528_saw_fifo}{{xviii}{24}{Measurement of a generated SAW signal with the FIFO Empty flag\relax}{figure.caption.18}{}}
\@writefile{lof}{\contentsline{figure}{\numberline{xix}{\ignorespaces A transmission between the FIFO and the DAC\relax}}{25}{figure.caption.19}\protected@file@percent }
\newlabel{fig:fifo_dac}{{xix}{25}{A transmission between the FIFO and the DAC\relax}{figure.caption.19}{}}
\@writefile{lof}{\contentsline{figure}{\numberline{xx}{\ignorespaces A fifo store operation in contrast to the load operation\relax}}{25}{figure.caption.20}\protected@file@percent }
\newlabel{fig:fifo_dac_store}{{xx}{25}{A fifo store operation in contrast to the load operation\relax}{figure.caption.20}{}}
\newlabel{lst:dac_saw}{{IV}{25}{SAW Generation for the DAC with FIFO}{lstlisting.4}{}}
\@writefile{lol}{\contentsline{lstlisting}{\numberline{IV}SAW Generation for the DAC with FIFO}{25}{lstlisting.4}\protected@file@percent }
\newlabel{lst:dac_sine}{{VI}{26}{DAC Sine Generation}{lstlisting.6}{}}
\@writefile{lol}{\contentsline{lstlisting}{\numberline{VI}DAC Sine Generation}{26}{lstlisting.6}\protected@file@percent }
\@writefile{lof}{\contentsline{figure}{\numberline{xxi}{\ignorespaces Storage and retrieval of a sine to and from the FIFO\relax}}{27}{figure.caption.21}\protected@file@percent }
\newlabel{fig:fifo_sine_store}{{xxi}{27}{Storage and retrieval of a sine to and from the FIFO\relax}{figure.caption.21}{}}
\@writefile{lof}{\contentsline{figure}{\numberline{xxii}{\ignorespaces Measuremet of the generated sine from the sine LUT on DACA and DACB\relax}}{27}{figure.caption.22}\protected@file@percent }
\newlabel{fig:sine_dacab}{{xxii}{27}{Measuremet of the generated sine from the sine LUT on DACA and DACB\relax}{figure.caption.22}{}}
\@writefile{toc}{\contentsline{section}{\numberline{3}Addressing DACA and DACB}{28}{section.3}\protected@file@percent }
\@writefile{toc}{\contentsline{subsection}{\numberline{3.1}FPGA to Hardware interface}{28}{subsection.3.1}\protected@file@percent }
\@writefile{lof}{\contentsline{figure}{\numberline{xxiii}{\ignorespaces 3.3V to 5V conversion using the level shifter\relax}}{29}{figure.caption.23}\protected@file@percent }
\newlabel{fig:3v35v}{{xxiii}{29}{3.3V to 5V conversion using the level shifter\relax}{figure.caption.23}{}}
\@writefile{lof}{\contentsline{figure}{\numberline{xxiv}{\ignorespaces 5V to 3.3V conversion using the level shifter\relax}}{30}{figure.caption.24}\protected@file@percent }
\newlabel{fig:5v3v3}{{xxiv}{30}{5V to 3.3V conversion using the level shifter\relax}{figure.caption.24}{}}
\@writefile{lof}{\contentsline{figure}{\numberline{xxv}{\ignorespaces The internal schematics of the level shifter\cite{lvlshift}\relax}}{30}{figure.caption.25}\protected@file@percent }
\newlabel{fig:schem_lvlshift}{{xxv}{30}{The internal schematics of the level shifter\cite{lvlshift}\relax}{figure.caption.25}{}}
\@writefile{lof}{\contentsline{figure}{\numberline{xxvi}{\ignorespaces The internal clamping diodes of the Analog Discovery 2\cite{ad2}\relax}}{31}{figure.caption.26}\protected@file@percent }
\newlabel{fig:ad2_diode}{{xxvi}{31}{The internal clamping diodes of the Analog Discovery 2\cite{ad2}\relax}{figure.caption.26}{}}
\@writefile{toc}{\contentsline{subsubsection}{\numberline{4.1.1}General definitions and pinout of the AVR}{32}{subsubsection.4.1.1}\protected@file@percent }
\@writefile{lof}{\contentsline{figure}{\numberline{xxvii}{\ignorespaces The output of an example track part 1\relax}}{42}{figure.caption.27}\protected@file@percent }
\newlabel{fig:textadv_track_ex1}{{xxvii}{42}{The output of an example track part 1\relax}{figure.caption.27}{}}
\@writefile{lof}{\contentsline{figure}{\numberline{xxviii}{\ignorespaces The output of an example track part 2\relax}}{43}{figure.caption.28}\protected@file@percent }
\newlabel{fig:textadv_track_ex2}{{xxviii}{43}{The output of an example track part 2\relax}{figure.caption.28}{}}
\@writefile{lof}{\contentsline{figure}{\numberline{xxix}{\ignorespaces A regular beginning of the game\relax}}{48}{figure.caption.29}\protected@file@percent }
\newlabel{fig:tetadv_gameplay}{{xxix}{48}{A regular beginning of the game\relax}{figure.caption.29}{}}
\@writefile{toc}{\contentsline{section}{\numberline{6}Creating a design}{50}{section.6}\protected@file@percent }
\@writefile{toc}{\contentsline{section}{\numberline{7}Simulating a design}{52}{section.7}\protected@file@percent }
\@writefile{lof}{\contentsline{figure}{\numberline{xxx}{\ignorespaces Screenshot of the resulting waveform in GTKWave\relax}}{53}{figure.caption.30}\protected@file@percent }
\@writefile{toc}{\contentsline{section}{\numberline{8}Synthesizing a design}{53}{section.8}\protected@file@percent }
\@writefile{lof}{\contentsline{figure}{\numberline{xxxi}{\ignorespaces Block diagram of the video core\relax}}{58}{figure.caption.31}\protected@file@percent }
\@writefile{lof}{\contentsline{figure}{\numberline{xxxiii}{\ignorespaces Block diagram of the text renderer\relax}}{60}{figure.caption.33}\protected@file@percent }
\@writefile{lof}{\contentsline{figure}{\numberline{xxxiv}{\ignorespaces Block diagram of the WS2812 driver\relax}}{60}{figure.caption.34}\protected@file@percent }
\@writefile{lof}{\contentsline{figure}{\numberline{xxxv}{\ignorespaces Timing diagram for the WS2812 serial protocol\relax}}{61}{figure.caption.35}\protected@file@percent }
\newlabel{fig:ws2812_timing}{{xxxv}{61}{Timing diagram for the WS2812 serial protocol\relax}{figure.caption.35}{}}
\@writefile{lof}{\contentsline{figure}{\numberline{xxxvi}{\ignorespaces Block diagram of the CPU core\relax}}{63}{figure.caption.36}\protected@file@percent }