Added more after another day of corona

Signed-off-by: Tyrolyean <tyrolyean@tyrolyean.net>
This commit is contained in:
Tyrolyean 2020-03-20 00:09:03 +01:00
parent 1fe628bf1a
commit fe336cda09
No known key found for this signature in database
GPG key ID: 81EC9BAC5E9667C6
52 changed files with 6551 additions and 8999 deletions

38
bibliographies/DP.bib Normal file
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@ -0,0 +1,38 @@
@Manual{pc16550,
title = {PC16550D Universal Asynchronous Receiver/Transmitter With FIFOs},
organization = {Texas Instruments Inc.},
year = {1995},
url = {https://www.scs.stanford.edu/10wi-cs140/pintos/specs/pc16550d.pdf},
}
@Manual{idt7201,
title = {CMOS ASYNCHRONOUS FIFO},
author = {{Integrated Device Technology, Inc.}},
organization = {RENESAS},
year = {2002},
url = {http://www.komponenten.es.aau.dk/fileadmin/komponenten/Data_Sheet/Memory/IDT7201.pdf},
}
@Manual{tlc7528,
title = {DUAL 8-BIT MUTLIPLYING DIGITAL-TO-ANALOG CONVERTERS},
organization = {Texas Instruments Inc.},
year = {1987},
url = {http://www.komponenten.es.aau.dk/fileadmin/komponenten/Data_Sheet/Memory/IDT7201.pdf},
}
@techreport{rs232,
type = {Standard},
key = {TIA-/EIA-232-F},
month = October,
year = {1997},
title = {Interface Between Data Terminal Equipment and Data Circuit- Terminating Equipment Employing Serial Binary Data Interchange},
volume = {1997}
}
@Manual{max232,
month = February,
year = {1989},
title = {MAX232x Dual EIA-232 Drivers/Receivers},
organization = {Texas Instruments Inc.},
url = {https://www.ti.com/lit/ds/symlink/max232.pdf}
}

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@ -1,31 +1,14 @@
/* Copyright © 2020 tyrolyean
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#define F_CPU 16000000UL
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <avr/wdt.h>
#include <util/delay.h>
#include <avr/interrupt.h>
#define BUS_HOLD_US 1
/* Shift values inside the PORTK Register */
/* Shift values inside the PORTL Register */
#define WR_SHIFT 1
#define RD_SHIFT 2
#define MR_SHIFT 0
@ -45,21 +28,6 @@
#define UART_REG_MSR 6
#define UART_REG_SCR 7
uint8_t mcusr_mirror __attribute__ ((section (".noinit")));
void get_mcusr(void) \
__attribute__((naked)) \
__attribute__((section(".init3")));
void get_mcusr(void)
{
mcusr_mirror = MCUSR;
MCUSR = 0;
wdt_disable();
}
int routine();
void set_addr(uint8_t addr){
PORTK = addr;
@ -75,7 +43,7 @@ void write_to_16550(uint8_t addr, uint8_t data){
PORTF = data;
PORTL &= ~(1<<CS_SHIFT);
_delay_us(BUS_HOLD_US); /*Wait for the data and signal lanes to become stable*/
_delay_us(BUS_HOLD_US);
PORTL |= 1<<CS_SHIFT;
set_addr(0x00);
@ -94,7 +62,7 @@ uint8_t read_from_16550(uint8_t addr){
PORTL &= ~(1<<RD_SHIFT);
PORTL &= ~(1<<CS_SHIFT);
_delay_us(BUS_HOLD_US); /* Wait for the data and signal lanes to become stable*/
_delay_us(BUS_HOLD_US);
data = PINF;
PORTL |= 1<<CS_SHIFT;
set_addr(0x00);
@ -115,9 +83,6 @@ int main(){
DDRF = 0xFF; /* Data Bus */
DDRK = 0xFF; /* Address Bus */
DDRL = 0xFF; /* Control Bus */
PORTF = 0x00;
PORTK = 0x00;
PORTL = 0x00;
/* Cleanly reset the 16550 uart */
PORTL |= (1<<WR_SHIFT);
@ -129,47 +94,17 @@ int main(){
PORTL &= ~(1<<MR_SHIFT);
_delay_us(1000);
write_to_16550(UART_REG_LCR,0x83);
write_to_16550(UART_REG_DLLS,0x03);
write_to_16550(UART_REG_DLMS,0x00);
write_to_16550(UART_REG_LCR,0x03);
write_to_16550(UART_REG_TXRX,'I');
_delay_us(10000);
write_to_16550(UART_REG_TXRX,'N');
_delay_us(10000);
write_to_16550(UART_REG_TXRX,'I');
_delay_us(10000);
write_to_16550(UART_REG_TXRX,'T');
_delay_us(10000);
write_to_16550(UART_REG_TXRX,'\r');
_delay_us(10000);
write_to_16550(UART_REG_TXRX,'\n');
_delay_us(10000);
sei();
/* Enable the hardware watchdog. In case the microcontroller fails to
* finish it's task within the specified time, the watchdog will reset
* the atmel cookie.
*/
wdt_enable(WDTO_1S);
for(;;){
wdt_reset();
routine();
}
if(read_from_16550(UART_REG_LSR) & 0x01){
write_to_16550(UART_REG_TXRX,
read_from_16550(UART_REG_TXRX));
}
}
return 0;
}
int routine(){
uint8_t received = read_from_16550(UART_REG_LSR);
if(received & 0x01){
received = read_from_16550(UART_REG_TXRX);
write_to_16550(UART_REG_TXRX,received);
}
return 0;
}

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@ -1,33 +1,16 @@
/* Copyright © 2020 tyrolyean
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#define F_CPU 16000000UL
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <avr/wdt.h>
#include <stdint.h>
#include <util/delay.h>
#include <avr/interrupt.h>
/* Shift values inside the PORTK Register */
#define BUS_HOLD_US 1
/* Shift values inside the PORTL Register */
#define WR_SHIFT 1
#define RD_SHIFT 2
#define MR_SHIFT 0
#define CS_SHIFT 3
#define CS_ADC_SHIFT 4
/* Registers in the 16550 UART */
@ -42,21 +25,6 @@
#define UART_REG_MSR 6
#define UART_REG_SCR 7
uint8_t mcusr_mirror __attribute__ ((section (".noinit")));
void get_mcusr(void) \
__attribute__((naked)) \
__attribute__((section(".init3")));
void get_mcusr(void)
{
mcusr_mirror = MCUSR;
MCUSR = 0;
wdt_disable();
}
int routine();
void set_addr(uint8_t addr){
PORTK = addr;
@ -67,11 +35,12 @@ void write_to_16550(uint8_t addr, uint8_t data){
set_addr(addr);
DDRF = 0xFF;
PORTL &= ~(1<<WR_SHIFT);
PORTF = data;
PORTL &= ~(1<<CS_SHIFT);
_delay_us(2); /*Wait for the data and signal lanes to become stable*/
_delay_us(BUS_HOLD_US);
PORTL |= 1<<CS_SHIFT;
set_addr(0x00);
@ -80,6 +49,24 @@ void write_to_16550(uint8_t addr, uint8_t data){
return;
}
uint8_t read_from_16550(uint8_t addr){
uint8_t data = 0x00;
set_addr(addr);
DDRF = 0x00;
PORTF = 0x00;
PORTL &= ~(1<<RD_SHIFT);
PORTL &= ~(1<<CS_SHIFT);
_delay_us(BUS_HOLD_US);
data = PINF;
PORTL |= 1<<CS_SHIFT;
set_addr(0x00);
PORTL |= 1<<RD_SHIFT;
DDRF = 0xFF;
PORTF = 0x00;
_delay_us(BUS_HOLD_US); /*Wait for the data and signal lanes to become stable*/
return data;
}
int main(){
@ -103,40 +90,17 @@ int main(){
_delay_us(100);
PORTL &= ~(1<<MR_SHIFT);
_delay_us(1000);
sei();
/* Enable the hardware watchdog. In case the microcontroller fails to
* finish it's task within the specified time, the watchdog will reset
* the atmel cookie.
*/
wdt_enable(WDTO_1S);
for(;;){
wdt_reset();
routine();
write_to_16550(UART_REG_LCR,0x83);
write_to_16550(UART_REG_DLLS,0x03);
write_to_16550(UART_REG_DLMS,0x00);
write_to_16550(UART_REG_LCR,0x03);
write_to_16550(UART_REG_TXRX,'A');
_delay_us(10000);
}
return 0;
}
int routine(){
write_to_16550(UART_REG_LCR,0x83);
write_to_16550(UART_REG_DLLS,0x03);
write_to_16550(UART_REG_DLMS,0x00);
write_to_16550(UART_REG_LCR,0x03);
write_to_16550(UART_REG_TXRX,'A');
_delay_us(10000);
write_to_16550(UART_REG_TXRX,'B');
_delay_us(10000);
write_to_16550(UART_REG_TXRX,'!');
_delay_us(10000);
write_to_16550(UART_REG_TXRX,'\r');
_delay_us(10000);
write_to_16550(UART_REG_TXRX,'\n');
_delay_us(10000);
return 0;
}

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@ -1,4 +1,4 @@
/* Copyright © 2020 tyrolyean
/* Copyright (C) 2020 tyrolyean
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by

View file

@ -18,6 +18,7 @@
#define _GAME_H
#include <stdint.h>
#include <stdbool.h>
extern char command_buffer[100];
extern uint8_t command_buffer_pointer;
@ -28,5 +29,12 @@ void routine_game();
void prepare_command_buffer();
void ingest_user_char(char in);
void perform_action(uint8_t action_id);
void move_direction(uint8_t direction);
void describe_room(uint8_t room, bool auto_desc);
void print_inventory();
void print_room_item();
void consume_room_item();
void use_item(const char* item_name);
void use_item_id(uint8_t item_id);
#endif

View file

@ -17,11 +17,13 @@
#ifndef _STRUCTURES_H
#define _STRUCTURES_H
#include <sound.h>
#include <stdint.h>
#include <avr/pgmspace.h>
#include <stdbool.h>
#define NUM_ACTIONS 0x07
#define NUM_ACTIONS 0x0A
#define ACTION_HELP 0x00
#define ACTION_NORTH 0x01
#define ACTION_SOUTH 0x02
@ -29,6 +31,36 @@
#define ACTION_EAST 0x04
#define ACTION_DESCRIBE 0x05
#define ACTION_USE 0x06
#define ACTION_INVENTORY 0x07
#define ACTION_SEARCH 0x08
#define ACTION_TAKE 0x09
/* The direction in the direction table is the action_id - 1 */
#define DIRECTION_NORTH 0x00
#define DIRECTION_SOUTH 0x01
#define DIRECTION_WEST 0x02
#define DIRECTION_EAST 0x03
#define NUM_ROOMS 0x0A
#define ROOM_NOTHING 0x00
#define ROOM_LONELYROAD 0x01
#define ROOM_SNDIRTROAD 0x02
#define ROOM_FIREPLACE 0x03
#define ROOM_EWSTREET 0x04
#define ROOM_OLDHOUSE 0x05
#define ROOM_LIVINGROOM 0x06
#define ROOM_ATTIC 0x07
#define ROOM_BASEMENT 0x08
#define ROOM_COMPUTERROM 0x09
#define NUM_ITEMS 0x07
#define ITEM_FLOPPY 0x00
#define ITEM_SCREWDRIVER 0x01
#define ITEM_KEY 0x02
#define ITEM_SAUSAGE 0x03
#define ITEM_FLESH 0x04
#define ITEM_KEYBOARD 0x05
#define ITEM_PISTOL 0x06
extern const uint8_t sine_table[256] PROGMEM;
extern const uint8_t noise_table[1024] PROGMEM;
@ -36,9 +68,12 @@ extern const char* text_table[];
extern const char* info_table[];
extern const char* action_table[NUM_ACTIONS];
extern const char* room_table[];
extern const char* room_description_table[];
extern const bool room_action_table[][NUM_ACTIONS];
extern const char* item_table[];
extern const char* room_table[NUM_ROOMS];
extern const char* room_description_table[NUM_ROOMS];
extern uint8_t room_map_table[NUM_ROOMS][4];
extern bool room_visited_table[NUM_ROOMS];
extern const char* item_table[NUM_ITEMS];
extern bool inventory[NUM_ITEMS];
extern int8_t item_room_map[NUM_ROOMS];
extern const struct tone_t * room_track_map[NUM_ROOMS];
#endif

View file

@ -25,7 +25,7 @@
char command_buffer[100];
uint8_t command_buffer_pointer = 0x00;
uint8_t current_room = 0x00;
uint8_t current_room = ROOM_LONELYROAD;
void routine_game(){
@ -69,7 +69,12 @@ void routine_game(){
}
void ingest_user_char(char in){
command_buffer[command_buffer_pointer++] = in;
if(in == 0x7F /* DELETE CHAR */){
command_buffer[command_buffer_pointer--] = 0x00;
}else{
command_buffer[command_buffer_pointer++] = in;
}
return;
}
@ -85,11 +90,141 @@ void perform_action(uint8_t action_id){
break;
case ACTION_DESCRIBE:
println(room_table[current_room]);
putchar_16550('\n', NULL);
println(room_description_table[current_room]);
describe_room(current_room, false);
break;
case ACTION_NORTH:
case ACTION_SOUTH:
case ACTION_WEST:
case ACTION_EAST:
move_direction(action_id -1);
break;
case ACTION_INVENTORY:
print_inventory();
break;
case ACTION_SEARCH:
print_room_item();
break;
case ACTION_TAKE:
consume_room_item();
break;
case ACTION_USE:
use_item(command_buffer+
strlen(action_table[ACTION_USE])+1);
break;
};
println(info_table[3]);
return;
}
void move_direction(uint8_t direction){
if(!room_map_table[current_room][direction]){
println(info_table[4]);
return;
}
println("Moving towards %s",action_table[direction+1]);
current_room = room_map_table[current_room][direction];
describe_room(current_room,true);
current_track = room_track_map[current_room];
return;
}
void describe_room(uint8_t room, bool auto_desc){
println(room_table[room]);
if(room_visited_table[room] && auto_desc){
room_visited_table[room] = true;
return;
}
room_visited_table[room] = true;
putchar_16550('\n', NULL);
println(room_description_table[room]);
return;
}
void print_inventory(){
bool found_item = false;
for(size_t i = 0; i < NUM_ITEMS; i++){
if(inventory[i]){
found_item = true;
break;
}
}
if(found_item){
println("You have:");
for(size_t i = 0; i < NUM_ITEMS; i++){
if(inventory[i]){
println(" %s",item_table[i]);
}
}
}else{
println("Your inventory is empty");
}
return;
}
void print_room_item(){
if(item_room_map[current_room] < 0){
println(info_table[6]);
}else{
println("You found a %s",
item_table[item_room_map[current_room]]);
}
return;
}
void consume_room_item(){
if(item_room_map[current_room] < 0){
println(info_table[6]);
}else{
println("You took the %s",
item_table[item_room_map[current_room]]);
inventory[item_room_map[current_room]] = true;
item_room_map[current_room] = -1;
}
return;
}
void use_item(const char* item_name){
for(size_t i = 0; i < NUM_ITEMS; i++){
if(strncasecmp(item_table[i], item_name,
strlen(item_table[i])) == 0){
use_item_id(i);
return;
}
}
println(info_table[2]);
return;
}
void use_item_id(uint8_t item_id){
if(!inventory[item_id]){
println(info_table[2]);
return;
}
switch(item_id){
case ITEM_SAUSAGE:
if(current_room == ROOM_SNDIRTROAD){
inventory[ITEM_SAUSAGE] = false;
room_map_table[current_room][DIRECTION_NORTH] =
ROOM_FIREPLACE;
println(info_table[10]);
return;
}
break;
};
println(info_table[2]);
return;
}

View file

@ -84,8 +84,10 @@ int main(){
init_uart();
init_interrupts();
current_track = intro_track;
memset(room_visited_table, 0, NUM_ROOMS);
memset(inventory, 0, NUM_ITEMS);
describe_room(current_room,false);
sei();
println(room_description_table[0]);
/* Enable the hardware watchdog. In case the microcontroller fails to
* finish it's task within the specified time, the watchdog will reset
* the atmel cookie.

View file

@ -343,22 +343,19 @@ const uint8_t noise_table[1024] PROGMEM = {
};
const char* info_table[] = {
"ERROR",
"Invalid command!",
"You can't use that!",
"What are you going to do?",
"going ",
"NORTH",
"SOUTH",
"EAST",
"WEST",
"YOU MAY ACT NOW!",
"it died",
"it survived",
"a bear blocks the way",
"it ran away...",
"it won't start",
"you can't type"
"ERROR", // 0
"Invalid command!", // 1
"You can't use that!", // 2
"What are you going to do?", // 3
"You can't go that way!", // 4
"YOU MAY ACT NOW!", // 5
"There is nothing here..", // 6
"it died", // 7
"it survived", // 8
"a bear blocks the way", // 9
"it ran away...", // 10
"it won't start", // 11
"you can't type" // 12
};
const char* action_table[NUM_ACTIONS] = {
@ -368,7 +365,10 @@ const char* action_table[NUM_ACTIONS] = {
"west",
"east",
"describe",
"use"
"use",
"inventory",
"search",
"take",
};
const char* room_table[] = {
@ -376,7 +376,7 @@ const char* room_table[] = {
"LONELY ROAD",
"S/N DIRT ROAD",
"FIREPLACE",
"N/W Street",
"E/W Street",
"OLD HOUSE",
"LIVING ROOM",
"ATTIC",
@ -386,12 +386,14 @@ const char* room_table[] = {
const char* room_description_table[sizeof(room_table)/sizeof(const char*)] = {
"You stare into a void of nothingness. You see noone, you hear noone,"
"you feel someone.\n You look around, and see nothing, yet "
"you feel someone.\nYou look around, and see nothing, yet "
"you are no less scared. You have won..",
"LONELY ROAD",
"S/N DIRT ROAD",
"You are on the dead end of a lonely road. You look right and left of"
"you, but\nyou cannot remember why you are here... You are terrified.",
"You travel a bit towards the moon, you think that's the way to go. You"
" find a \nbear in the middle of the road sleeping seemingly in peace.",
"FIREPLACE",
"N/W Street",
"W/W STREET",
"OLD HOUSE",
"LIVING ROOM",
"ATTIC",
@ -399,19 +401,43 @@ const char* room_description_table[sizeof(room_table)/sizeof(const char*)] = {
"COMPUTER ROOM"
};
const bool room_action_table[sizeof(room_table)/sizeof(const char*)]
[NUM_ACTIONS] = {
{1, 1,0,0,0,1,0}
bool room_visited_table[sizeof(room_table)/sizeof(const char*)];
uint8_t room_map_table[sizeof(room_table)/sizeof(const char*)]
[4] = {
{0,0,0,0},
{2,0,0,0}, /* S/N DIRT ROAD */
{/*3*/0,1,0,0}, /* FIREPLACE, Progress locked until bear tamed */
{0,0,4,2}, /* E/W STREET */
};
const char* item_table[] = {
const char* item_table[NUM_ITEMS] = {
"FLOPPY DISK",
"SCREW DRIVER",
"KEY",
"SAUSAGE",
"ROTTEN FLESH",
"FLESH",
"KEYBOARD",
"PISTOL"
};
bool inventory[sizeof(item_table)/sizeof(const char*)];
int8_t item_room_map[NUM_ROOMS] = {
-1,
6,
3,
-1,
-1,
-1,
-1,
-1,
-1,
-1
};
const struct tone_t * room_track_map[NUM_ROOMS] = {
intro_track,
lonely_road_track,
computer_room_track
};

View file

@ -3,7 +3,7 @@
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@ -20,6 +20,7 @@
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@ -55,9 +55,9 @@
<file>blx-compat.def</file>
<file>biblatex.def</file>
<file>standard.bbx</file>
<file>authortitle.bbx</file>
<file>verbose.bbx</file>
<file>authoryear-ibid.cbx</file>
<file>numeric.bbx</file>
<file>numeric-comp.cbx</file>
<file>ieee.cbx</file>
<file>biblatex.cfg</file>
<file>german.lbx</file>
<file>ngerman.lbx</file>
@ -82,5 +82,8 @@
<requires type="dynamic">
<file>main.bcf</file>
</requires>
<requires type="editable">
<file>./bibliographies/DP.bib</file>
</requires>
</external>
</requests>

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@ -83,19 +83,23 @@ des generischen Maskulinums angewendet. Es wird an dieser Stelle darauf
hingewiesen, dass die ausschlie"sliche Verwendung der m"annlichen Form
geschlechtsunabh"angig verstanden werden soll.
This thesis is written in the language form if the generic masculin for improved
readability. It is pointed out that all masculin-only uses may and should be
interpreted as gender neutral.
%====================================================================================
\clearpage\vfill\newpage{}
%====================================================================================
\subsection*{Kurzfassung/Abstract\markboth{}{Kurzfassung/Abstract}}
\addcontentsline{toc}{section}{Kurzfassung/Abstract}
\input{sections/abstract.tex}
\newpage
\subsection*{Projektergebnis\markboth{}{Projektergebnis}}
\addcontentsline{toc}{section}{Projektergebnis}
%\input{sections/ergebnis.tex} TODO
%====================================================================================
\pagestyle{plain}
\selectlanguage{english}
\tableofcontents
\newpage
\pagestyle{fancy}
@ -109,15 +113,22 @@ geschlechtsunabh"angig verstanden werden soll.
%\section{Einleitung}
%\input{sections/einleitung.tex} TODO
\section{Aufgabenstellung}
\section{Task description}
\DP\input{planung/DP/aufgabenstellung.tex}
%\section{Planung}
%\DP\input{planung/DP/planung.tex}
\clearpage
% \MR\input{sections/Kapitel/MR/planungAufgabengenerator.tex}
\pagestyle{fancy}
\section{Hardware peripherials}
\DP\input{sections/DP/PARALLELBUS/main.tex}
\DP\input{sections/DP/MEAS_TEST/main.tex}
\DP\input{sections/DP/CASE_BACKPLANE/main.tex}
\DP\input{sections/DP/UART/main.tex}
\section{Textadventure}
\DP\input{sections/DP/textadv/main.tex}
\clearpage
%\MR\input{sections/Kapitel/MR/Aufgabengeneration.tex}
@ -127,6 +138,7 @@ geschlechtsunabh"angig verstanden werden soll.
%====================================================================================
\allAuth
\selectlanguage{ngerman}
\clearpage\vfill\newpage{}
%====================================================================================
\section{Erkl"arung der Eigenst"andigkeit der Arbeit}
@ -160,12 +172,13 @@ geschlechtsunabh"angig verstanden werden soll.
\clearpage\vfill\newpage{}
\pagenumbering{Roman}
%====================================================================================
\selectlanguage{english}
\renewcommand{\thesection}{\Roman{section}\;}
\setcounter{section}{0}
\listoffigures\thispagestyle{fancy}
\listoftables\thispagestyle{fancy}
\lstlistoflistings\thispagestyle{fancy}
\printbibliography[title={Literaturverzeichnis},heading=bibnumbered]
\printbibliography[title={Literaturverzeichnis}]
%====================================================================================
\clearpage\vfill\newpage{}

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@ -1,3 +1,4 @@
\babel@toc {english}{}
\boolfalse {citerequest}\boolfalse {citetracker}\boolfalse {pagetracker}\boolfalse {backtracker}\relax
\babel@toc {ngerman}{}
\babel@toc {ngerman}{}
@ -6,10 +7,38 @@
\babel@toc {ngerman}{}
\babel@toc {ngerman}{}
\contentsline {section}{Projektergebnis}{iii}{Doc-Start}%
\contentsline {section}{\numberline {1}Aufgabenstellung}{1}{section.1}%
\contentsline {subsection}{\numberline {1.1}Daniel Plank}{1}{subsection.1.1}%
\contentsline {section}{\numberline {2}Erkl"arung der Eigenst"andigkeit der Arbeit}{2}{section.2}%
\contentsline {section}{\numberline {I\tmspace +\thickmuskip {.2777em}}Abbildungsverzeichnis}{I}{section.1}%
\contentsline {section}{\numberline {II\tmspace +\thickmuskip {.2777em}}Tabellenverzeichnis}{I}{section.2}%
\babel@toc {english}{}
\contentsline {section}{\numberline {1}Task description}{1}{section.1}%
\contentsline {subsection}{\numberline {1.1}Hardware}{1}{subsection.1.1}%
\contentsline {section}{\numberline {2}Hardware peripherials}{2}{section.2}%
\contentsline {subsection}{\numberline {2.1}Parallel bus}{2}{subsection.2.1}%
\contentsline {subsubsection}{\numberline {2.1.1}Address Bus}{2}{subsubsection.2.1.1}%
\contentsline {subsection}{\numberline {2.2}Data Bus}{3}{subsection.2.2}%
\contentsline {subsection}{\numberline {2.3}Control Bus}{3}{subsection.2.3}%
\contentsline {subsubsection}{\numberline {2.3.1}Master Reset}{3}{subsubsection.2.3.1}%
\contentsline {subsubsection}{\numberline {2.3.2}Write Not}{3}{subsubsection.2.3.2}%
\contentsline {subsubsection}{\numberline {2.3.3}Read Not}{3}{subsubsection.2.3.3}%
\contentsline {subsubsection}{\numberline {2.3.4}Module Select 1 and 2 Not}{3}{subsubsection.2.3.4}%
\contentsline {subsection}{\numberline {2.4}Testing and Measurement}{4}{subsection.2.4}%
\contentsline {subsubsection}{\numberline {2.4.1}Measurements}{4}{subsubsection.2.4.1}%
\contentsline {subsubsection}{\numberline {2.4.2}Testing}{4}{subsubsection.2.4.2}%
\contentsline {subsection}{\numberline {2.5}Backplane}{5}{subsection.2.5}%
\contentsline {subsubsection}{\numberline {2.5.1}Termination resistors}{5}{subsubsection.2.5.1}%
\contentsline {subsection}{\numberline {2.6}Case}{6}{subsection.2.6}%
\contentsline {subsection}{\numberline {2.7}Serial Console}{8}{subsection.2.7}%
\contentsline {subsubsection}{\numberline {2.7.1}16550 UART}{8}{subsubsection.2.7.1}%
\contentsline {subsubsection}{\numberline {2.7.2}MAX-232}{9}{subsubsection.2.7.2}%
\contentsline {subsubsection}{\numberline {2.7.3}Schematics}{9}{subsubsection.2.7.3}%
\contentsline {paragraph}{Element Description}{11}{figure.caption.7}%
\contentsline {subsubsection}{\numberline {2.7.4}Demonstration Software}{13}{subsubsection.2.7.4}%
\contentsline {paragraph}{Transmit code}{13}{figure.caption.11}%
\contentsline {paragraph}{Echo code}{16}{figure.caption.12}%
\contentsline {section}{\numberline {3}Textadventure}{17}{section.3}%
\contentsline {subsection}{\numberline {3.1}General Implementation details}{18}{subsection.3.1}%
\babel@toc {ngerman}{}
\contentsline {section}{\numberline {4}Erkl"arung der Eigenst"andigkeit der Arbeit}{20}{section.4}%
\babel@toc {english}{}
\contentsline {section}{\numberline {I\tmspace +\thickmuskip {.2777em}}List of Figures}{I}{section.1}%
\contentsline {section}{\numberline {II\tmspace +\thickmuskip {.2777em}}List of Tables}{I}{section.2}%
\contentsline {section}{\numberline {III\tmspace +\thickmuskip {.2777em}}Listings}{I}{section.3}%
\contentsline {section}{Anhang}{II}{section.3}%

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@ -1,2 +1,20 @@
\subsection{Daniel Plank}
\subsection{Hardware}
Due to the recurring questions in the environment of the Hackerspace Innsbruck
about the internal workings of a computer system and the lack of material to
demonstrate these, hardware should be developed for educational purposes.
This hardware should not be to complex to understand but still demonstrate basic
tasks of a computer system. The targeted computing tasks are human interface
device controllers, under which a \textbf{D}igital to \textbf{A}nalog
\textbf{C}onverter\footnote{From now on reffered to simply as DAC} and a serial
console with TIA-/EIA-232 compliant voltage levels were chosen. For these
peripherials schematics and a working implementation in the hardware building
style of the hackerspace should be built. All nescessary hardware will be
provided by the Hackerspace. If possible already present hardware should be
used, if impossible new one will be ordered. All schematics should, whenether
possible be written in open-source software such as Kicad or GNU-EDA.
If possible software-examples should be written as well, though the complexity
of these was coupled to the time left to spend on the project. Software should
be written in C, the coding convention is left to the implementer.

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@ -15,10 +15,10 @@
\usepackage[utf8]{inputenc}
\usepackage[english,ngerman,]{babel}
\selectlanguage{english}
\usepackage[OT2,T1]{fontenc}
\usepackage{svg} % Allows the inclusion of SVG files
\usepackage{amssymb}
\usepackage{ulem}
\usepackage{amsmath}
@ -131,9 +131,9 @@
\makeindex
%%% BibLaTeX settings
\usepackage[style = verbose, dashed=false, citestyle = authoryear-ibid, maxcitenames=1]{biblatex}
\usepackage[citestyle = ieee]{biblatex}
\usepackage{csquotes}
%\addbibresource{./bibliographies/MR.bib}
\addbibresource{./bibliographies/DP.bib}
\DeclareNameAlias{sortname}{family-given}
\renewcommand\multinamedelim{;\ }
\renewcommand\finalnamedelim{;\ }
@ -174,7 +174,7 @@ minimum height=1cm, align=center, text width=3cm, draw=black, fill=blue!30]
\tikzstyle{process} = [rectangle, minimum width=3cm, minimum height=1cm, align=center, text width=3cm, draw=black, fill=orange!30]
\tikzstyle{decision} = [diamond, minimum width=3cm, minimum height=1cm, align=center, text width=3cm, draw=black, fill=green!30]
\tikzstyle{arrow} = [thick,->,>=latex]
\usetikzlibrary{external}
\usepackage[european, straightvoltages]{circuitikz}
\usepackage[per-mode=fraction]{siunitx}
\usepackage{breqn}
@ -303,16 +303,17 @@ minimum height=1cm, align=center, text width=3cm, draw=black, fill=blue!30]
keywordstyle=\color{red},
numberstyle=\tiny\color{codegray},
stringstyle=\color{purple},
basicstyle=\ttfamily,
basicstyle=\ttfamily\footnotesize,
breakatwhitespace=false,
breaklines=true,
captionpos=b,
keepspaces=true,
numbers=left,
columns=fixed,
showspaces=false,
showstringspaces=false,
showtabs=false,
tabsize=2
tabsize=4
}
\lstdefinelanguage{json}{

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@ -0,0 +1,58 @@
\subsection{Backplane}
To connect the modules to the microprocessor, many pins need to be connected
straight through. For this purpose a backplane was chosen where DIN41612
connectors can be used. These connectors were chosen for their large pin count
(96 pins) and their availability. The backplane connects all 96-pins straight
through. With the 6 outer left and right pins connected for VCC and ground,
as can be seen in figure \ref{fig:schem_back_conn}.
\begin{figure}[H]
\includegraphics[width=\textwidth, angle=0]{schem_pdf/backplane_conn.pdf}
\caption{Layout of the DIN41612 Connectors on the Backplane}
\label{fig:schem_back_conn}
\end{figure}
\subsubsection{Termination resistors}
In constrast to other systems using this backplane, no termination resistors
were used. This makes the bus more prone to refelctions, however these were not
a problem during development with the maximum transmission rate of 1MHz, as can
be seen in the sample recording in figure \ref{fig:reflex}
\begin{figure}[H]
\begin{tikzpicture}
\begin{axis}[
ylabel=Voltage on MS1,
xlabel=Time,
grid=both,
xmin = -0.000001,
xmax = 0.000002,
minor tick num=5,
width=\textwidth,
height=0.25\textheight]
\addplot table [x=t, y=c1, col sep=comma, mark=none] {meas/20200319reflexions.csv};
\end{axis}
\end{tikzpicture}
\caption{Measurement at around 1MHz bus clock on MS1}
\label{fig:reflex}
\end{figure}
The ripple seen in figure \ref{fig:reflex} are most likely due to
the sample rate of the Oszilloscope, which is around 10Mhz after an average
filter has been applied. The measurement was performed on the finished project,
with all cards installed.
\subsection{Case}
The case for the backplane was provided by the hackerspace, and is meant for
installation in a rack. The case is meant for installation of cards in the
EUROCARD format, therfore all modules were built by this formfactor.
\begin{figure}[H]
\includegraphics[width=\textwidth, angle=0]{pics/case}
\caption{The case with installed backplane}
\label{fig:case}
\end{figure}

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@ -0,0 +1,31 @@
\subsection{Testing and Measurement}
For functional testing and verification of implementation goals, measurements
needed to be performed invarious different ways and testing software was
required.
\subsubsection{Measurements}
Measurements were performed, if not noted otherwise, with the Analog Discovery
2 from Digilent as it has 16bit digital I/O Pins as well a a Waveform generator
and 2 differential oszilloscope inputs. These were for all nescessary
measurements enough. Though due to the size and construction of the device,
which can be seen in figure \ref{fig:ad2}
errors wer encountered while performing the measurements. These are noted on
occurance.
\begin{figure}[H]
\centering
\includegraphics[width=.6\textwidth, angle=0]{pics/ad2}
\caption{Digilent Analog Discovery 2;Source: \url{https://www.sparkfun.com/}}
\label{fig:ad2}
\end{figure}
\subsubsection{Testing}
All testing was performed with an Atmel ATMega2560 due to it's large amount
of I/O pins, 5V I/O which is the more common voltage level on CMOS
peripherials, way of addressing pins (8 at a time) and availability. All
testing software was written for this ATMega and compiled using the avr-gcc
from the GNU-Project.

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@ -1 +1,75 @@
\
\subsection{Parallel bus}
The core part of the hardware is the interface between the microprocessor and
the hardware peripherials. This bus is delivering data in parallel and is
therefore named the ``parallel bus``. This bus has 3 different sub-parts:
\begin{enumerate}
\item{The address bus}
\item{The data bus}
\item{The control bus}
\end{enumerate}
This split is common in many computer architectures and bus systems used by
various microprocessor manufacturers. In figure \ref{fig:atari_pbi} the
layout of the Atari Parallel Bus Interface is shown as used on the Atari 800XL.
\begin{figure}[H]
\includegraphics[width=\textwidth, angle=0]{pics/atari_pbi}
\caption{Atari PBI Pinout;Source: \url{https://www.atarimagazines.com}}
\label{fig:atari_pbi}
\end{figure}
\subsubsection{Address Bus}
The address bus contains the nescessary data lines for addressing the individual
registers of the Serial connection and the uart. On any modern system this bus
is from 16 to 64 bits wide. For our implementation the bus size was chosen to
be 8 bit, which is multiple times the amount of needed address space, but
is the smallest addressable unit on most microcontroller architectures and
therefore easy to program with. The address bus is unidirectional.
\subsection{Data Bus}
The data bus contains the actual data to be stored to and read from registers.
The data bus is, as well on most systems a multiple of 16 bits wide, but for the
same reasons as the data bus, was shrunk down in our case to 8 bits. The data
bus is bidirectional.
\subsection{Control Bus}
Control bus is a term which referes to any control lines (such as read and write
lines or clock lines) which are neither address nor data bus. The control bus
in our case needed to be 5 bits wide and consists of:
\begin{itemize}
\item{$MR$ ... Master Reset}
\item{$\lnot WR$ ... Write Not}
\item{$\lnot RD$ ... Read Not}
\item{$\lnot MS1$ ... Module Select 1 Not}
\item{$\lnot MS2$ ... Module Select 2 Not}
\end{itemize}
\subsubsection{Master Reset}
A high level on the $MR$ lane signals to the peripherials that a reset of all
registers and states should occure. This is needed for the serial console and
the dac.
\subsubsection{Write Not}
A low level on the $\lnot WR$ lane signals the corresponding modules that the
data on
the data bus should be written to the register on the address specified from the
address bus.
\subsubsection{Read Not}
A low level on the $\lnot RD$ lane signals the corresponding modules that the
data
from the register specified by the address on the address bus should be written
to the data bus.
\subsubsection{Module Select 1 and 2 Not}
A low level on one of these lines signals the corresponding module that the
data on address data and the control lines is meant for it.

200
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@ -0,0 +1,200 @@
\subsection{Serial Console}
One core part of any computer systems is it's way to get human input. On older
systems, and even today on server machines, this is done via a serial console.
On this serial console, characters are transmitted in serial, which means bit
by bit over the same line. The voltage levels used in these systems vary from
5V to 3.3V or +-10V. The most common standart for these voltage levels is the
former RS-232\footnote{RS... Recommended Standard} or as it should be called
now TIA-\footnote{TIA...Telecommunications Industry
Association}/EIA-\footnote{EIA.. Electronic Industries Alliance}232. Voltage-
levels as per TIA-/EIA Standard are not practical to handle over short
distances to handle however, so other voltages are used on most interface chips
and need to be converted.
\subsubsection{16550 UART}
The 16550 UART\footnote{Uinversal Asynchronous Receiver and Transmitter} is a
very common interface chip for serial communications. It produces 5V logic
levels as output on TX and needs the same as input on RX. Thoug common for a
UART, these voltage levels need to be converted to TIA-/EIA-232 levels for a
more common interface.
The 16550 UART is, in it's core a 16450 UART, but has been given a FIFO
\footnote{First-In First-Out} buffer. It needs three address lines, and 8
data lines, which can be seen in figure \ref{fig:16550_pinout}
\begin{figure}[H]
\centering
\includesvg[height=.3\textheight, angle=0]{pics/pc16550d_pinout.svg}
\caption{PC-16550D Pinout\cite{pc16550}}
\label{fig:16550_pinout}
\end{figure}
In figure \ref{fig:16550_pinout} the most important lanes are the SIN and
sout lanes, as they contain the serial data to and from the 16550 UART.
\subsubsection{MAX-232}
To convert the voltage levels of the 16550 UART to levels compliant wit
TIA-/EIA-232 levels, the MAX-232 is used. It has two transmitters and two
receivers side and generates the needed voltage levels via an internal voltage
pump\cite{max232}.
\subsubsection{Schematics}
Based on the descriptions in the datasheets the schematic in figure
\ref{fig:schem_uart} was developed.
\begin{figure}[H]
\centering
\includegraphics[height=.65\textheight, angle=-90]{schem_pdf/16550.pdf}
\caption{The schematic of the UART Module}
\label{fig:schem_uart}
\end{figure}
\paragraph{Element Description}
The quartz oszillator Y1 is the clock source for the Baud Rate generation and
was chosen with 1.8432 MHz for availability reasons and because it is the lowest
ozillator from which all common baud rates can still be derived from
\cite{pc16550}.
Resistors R1 and R2 are for stability and functionality of the Oszillator
nescessary as per datasheet. The resulting frequency can bemeasured via
J1, the measurement can be seen in \ref{fig:uartquartz}. C1 is used to
stabilize the
voltage for the 16550 UART and is common practice. Via JP1 the UART can be
transformed into a USRT where the receiver is synchronized to the transmitter
via a clock line. This mode has, however, not been tested, and the clock needs
to be 16 times the receiver clock rate\cite{pc16550}. The final output of the
16550 UART can be used and measured via J2, as shown in figure \ref{fig:uart232}
. Before the UART on J2 can be use however, the Jumpers JP2 and JP3 need to be
removed as otherwise the MAX-232 will short out with the incoming signal.
capacitors C4, C6, C7, C7 and C8 are for the voltage pump as defined in the
datasheet\cite{max232}. R4 and R5 have been suggested by the supervisor in
order toavoid damage to the MAX-232. The RJ-45 plug is used to transmit the
TIA-/EIA-232 signal, rather than the more common D-SUB connector, because the
RJ-45 connector fits on a 2.54mm grid. The Pinout onthe RJ-45 plug can be seen
in figure \ref{fig:rs232rj45}. C5 has the same functionality for the
MAX-232 as the C1 has to the 16550-UART.
\begin{figure}[H]
\begin{tikzpicture}
\begin{axis}[
ylabel=Quartz Voltage,
xlabel=Time,
grid=both,
minor tick num=5,
width=\textwidth,
height=0.5\textheight]
\addplot table [x=t, y=c1, col sep=comma, mark=none] {meas/20200319uartquartz.csv};
\end{axis}
\end{tikzpicture}
\caption{Measurement of the 1.8432 MHz Output on J1}
\label{fig:uartquartz}
\end{figure}
\begin{figure}[H]
\begin{tikzpicture}
\begin{axis}[
ylabel=Lane Voltage,
xlabel=Time,
grid=both,
minor tick num=5,
width=\textwidth,
height=0.5\textheight]
\addplot table [x=t, y=c1, col sep=comma, mark=none] {meas/20200218ttluart.csv};
\addplot table [x=t, y=c2, col sep=comma, mark=none] {meas/20200218ttluart.csv};
\legend{TIA-/EIA-232 level,UART level}
\end{axis}
\end{tikzpicture}
\caption{Measurement of a character transmission before and after MAX-232}
\label{fig:uart232}
\end{figure}
\begin{figure}[H]
\centering
\includegraphics[width=\textwidth, angle=0]{pics/rj45-consoleport-iface-500.png}
\caption{Pinout of the RJ-45 Plug; Src: \url{https://www.wti.com/}}
\label{fig:rs232rj45}
\end{figure}
\subsubsection{Demonstration Software}
To demonstrate the functionality and prove, that the schematic has no underlying
error, a program which regularly transmits a character was written as well as
a simple echo program, which transmits all received characters. Both programs
transmit 8 bit characters without parity at 38400 Baud. The output for program
one can be seen in figure \ref{fig:uart232} and the output for program two in
figure \ref{fig:232_echo}.
\begin{figure}[H]
\begin{tikzpicture}
\begin{axis}[
ylabel=Lane Voltage,
xlabel=Time,
grid=both,
minor tick num=5,
width=\textwidth,
height=0.5\textheight]
\addplot table [x=t, y=c1, col sep=comma, mark=none] {meas/20200218echo.csv};
\addplot table [x=t, y=c2, col sep=comma, mark=none] {meas/20200218echo.csv};
\legend{RX,TX}
\end{axis}
\end{tikzpicture}
\caption{Measurement of a character echo}
\label{fig:232_echo}
\end{figure}
\paragraph{Transmit code}
The transmit code regularly transmits the letter capital A via the 16550 UART,
but before it can do this it needs to perform some initialisations. The
functions shown in listing \ref{lst:16550-general} are the read and write
routines for accessing the 16550 UART. These routines also apply to the echo
code.
\lstinputlisting[language=C,frame=trBL,
breaklines=true, breakautoindent=true, formfeed=\newpage,
label={lst:16550-general}, caption={Read and write routines for the
16550 UART},
columns=flexible, style=cstyle, firstline=0, lastline=69]
{code/16550/transmit/src/main.c}
To write to the 16550 UART, you need to perform some setup tasks. After startup,
it requires a $MR$ for at least 5µs\cite{pc16550}. The baud rate divisor latch
needs to be set to the specified divisor for the desired
baud rate, and the character width and parity control
needs to be set. The $MR$ signal is beeing generated by the AVR on bootup. To
access the divisor latch, the divisor latch access bit needs to be set and
after setting up the baud rate divisor latch, it nees to be cleared to allow
a regular transmission. This process can be seen in listing \ref{lst:16550-transmit}
\lstinputlisting[language=C,frame=trBL,
breaklines=true, breakautoindent=true, formfeed=\newpage,
label={lst:16550-transmit}, caption={16550 INIT routines and single char transmission},
columns=flexible, style=cstyle, firstline=71, lastline=106]
{code/16550/transmit/src/main.c}
The output of this code on the address, data and control bus as well as on the
SOUT lane of the 16550 UART can be seen in figure \ref{fig:16550A}
\begin{figure}[H]
\centering
\includegraphics[width=\textwidth, angle=0]{meas/20200211_first_trans.png}
\caption{Transmission of character A via the 16550 UART}
\label{fig:16550A}
\end{figure}
\paragraph{Echo code}
The echo code permanently polls the 16550 UART wether a character has been
received, and if yes, reads it from the receiver holding register andwrites it
back to the tx holding register. The output of this code can be seen in figure
\ref{fig:232_echo}. The initialisation is practically the same as for the
transmission code, as well as the read and write routines in listing
\ref{lst:16550-general}.
\lstinputlisting[language=C,frame=trBL,
breaklines=true, breakautoindent=true, formfeed=\newpage,
label={lst:16550-echo}, caption={16550 character echo},
columns=flexible, style=cstyle, firstline=76, lastline=109]
{code/16550/echo/src/main.c}

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To illustrate how the components work together and can be used in various
different applications, a small text-adventure with audio effects was written in
C. The main goal was to show the capabilities of even small systems like the
one developed.
\subsection{General Implementation details}
Like the before examples, the textadventure was implemented on an ATMega2560
and uses 3 different Registers for transmission: PORTF, PORTK and PORTL for
address bus, data bus and control bus respectively, as can be seen in listing
\ref{lst:textadv-avr.h}
\lstinputlisting[language=C,frame=trBL,
breaklines=true, breakautoindent=true, formfeed=\newpage,
label={lst:textadv-avr.h}, caption={The avr.h header file},
columns=flexible, style=cstyle]{./code/textadv/include/avr.h}
The in listing \ref{lst:textadv-avr.h} shown defines MR_SHIFT, WR_SHIFT,
RD_SHIFT, CS_UART_SHIFT and CS_DAC_SHIFT are used to indicate the position of
the corresponding control lines inside the control bus register. All other
shift values are the same bitordering in input as in output.
The BUS_HOLD_US is used to tell the avr how many microsecons it takes for the
data bus to be latched into input register of the devices on write or how long
it takes for the data bus to become stable on read.

21
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