16 lines
420 B
VHDL
16 lines
420 B
VHDL
entity memctl is
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port (
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addr : in yarm_word;
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-- data width
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data_width : in datum_width_t;
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-- perfom sign extension when reading short data
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sign_extend : in std_logic;
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data_read : out yarm_word;
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data_write : in yarm_word;
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MEM_addr : out yarm_word;
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MEM_byte_enable : out std_logic_vector(3 downto 0);
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MEM_data_read : in yarm_word;
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MEM_data_write : out yarm_word
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);
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end memctl; |