107 lines
2 KiB
C
107 lines
2 KiB
C
#define F_CPU 16000000UL
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#include <stdint.h>
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#include <util/delay.h>
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#define BUS_HOLD_US 1
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/* Shift values inside the PORTL Register */
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#define WR_SHIFT 1
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#define RD_SHIFT 2
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#define MR_SHIFT 0
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#define CS_SHIFT 3
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#define CS_ADC_SHIFT 4
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/* Registers in the 16550 UART */
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#define UART_REG_DLLS 0
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#define UART_REG_DLMS 1
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#define UART_REG_TXRX 0
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#define UART_REG_IER 1
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#define UART_REG_IIR 2
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#define UART_REG_LCR 3
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#define UART_REG_MCR 4
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#define UART_REG_LSR 5
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#define UART_REG_MSR 6
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#define UART_REG_SCR 7
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void set_addr(uint8_t addr){
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PORTK = addr;
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return;
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}
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void write_to_16550(uint8_t addr, uint8_t data){
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set_addr(addr);
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DDRF = 0xFF;
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PORTL &= ~(1<<WR_SHIFT);
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PORTF = data;
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PORTL &= ~(1<<CS_SHIFT);
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_delay_us(BUS_HOLD_US);
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PORTL |= 1<<CS_SHIFT;
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set_addr(0x00);
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PORTL |= 1<<WR_SHIFT;
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PORTF = 0x00;
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return;
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}
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uint8_t read_from_16550(uint8_t addr){
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uint8_t data = 0x00;
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set_addr(addr);
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DDRF = 0x00;
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PORTF = 0x00;
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PORTL &= ~(1<<RD_SHIFT);
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PORTL &= ~(1<<CS_SHIFT);
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_delay_us(BUS_HOLD_US);
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data = PINF;
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PORTL |= 1<<CS_SHIFT;
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set_addr(0x00);
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PORTL |= 1<<RD_SHIFT;
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DDRF = 0xFF;
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PORTF = 0x00;
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_delay_us(BUS_HOLD_US); /*Wait for the data and signal lanes to become stable*/
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return data;
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}
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int main(){
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/* Disable interrupts during initialisation phase */
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cli();
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/* Setup Data Direction Registers and populate with sane default
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values */
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DDRF = 0xFF; /* Data Bus */
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DDRK = 0xFF; /* Address Bus */
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DDRL = 0xFF; /* Control Bus */
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PORTF = 0x00;
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PORTK = 0x00;
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PORTL = 0x00;
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/* Cleanly reset the 16550 uart */
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PORTL |= (1<<WR_SHIFT);
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PORTL |= (1<<RD_SHIFT);
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PORTL |= (1<<CS_SHIFT);
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PORTL |= (1<<MR_SHIFT);
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_delay_us(100);
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PORTL &= ~(1<<MR_SHIFT);
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_delay_us(1000);
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sei();
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for(;;){
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write_to_16550(UART_REG_LCR,0x83);
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write_to_16550(UART_REG_DLLS,0x03);
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write_to_16550(UART_REG_DLMS,0x00);
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write_to_16550(UART_REG_LCR,0x03);
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write_to_16550(UART_REG_TXRX,'A');
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_delay_us(10000);
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}
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return 0;
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}
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