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Cleanup!!

Browse source 
Signed-off-by: Tyrolyean <tyrolyean@tyrolyean.net>
This commit is contained in:
Tyrolyean 2020-03-28 16:47:04 +01:00
parent 647284c492
commit ee6978f189
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GPG key ID: 81EC9BAC5E9667C6
85 changed files with 567 additions and 12436 deletions
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21
.gitattributes vendored
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@ -1 +1,22 @@
main.pdf filter=lfs diff=lfs merge=lfs -text main.pdf filter=lfs diff=lfs merge=lfs -text
pics/slas062e_volt.svg filter=lfs diff=lfs merge=lfs -text
pics/uart.jpg filter=lfs diff=lfs merge=lfs -text
pics/bidirectonal-mosfet-level-shifter.png filter=lfs diff=lfs merge=lfs -text
pics/case.jpg filter=lfs diff=lfs merge=lfs -text
pics/pc16550d_pinout.svg filter=lfs diff=lfs merge=lfs -text
pics/gameplay.png filter=lfs diff=lfs merge=lfs -text
pics/HTLgenlogo02.png filter=lfs diff=lfs merge=lfs -text
pics/slas062e_pinout.svg filter=lfs diff=lfs merge=lfs -text
pics/dac.jpg filter=lfs diff=lfs merge=lfs -text
pics/final_front.jpg filter=lfs diff=lfs merge=lfs -text
pics/rj45-consoleport-iface-500.png filter=lfs diff=lfs merge=lfs -text
pics/ad2.jpg filter=lfs diff=lfs merge=lfs -text
pics/all_mod.jpg filter=lfs diff=lfs merge=lfs -text
pics/atari_pbi.png filter=lfs diff=lfs merge=lfs -text
pics/final_side.jpg filter=lfs diff=lfs merge=lfs -text
pics/fpga_int.jpg filter=lfs diff=lfs merge=lfs -text
pics/idt7201_pinout.svg filter=lfs diff=lfs merge=lfs -text
pics/logoBpdf.svg filter=lfs diff=lfs merge=lfs -text
pics/ad2_dio.png filter=lfs diff=lfs merge=lfs -text
pics/atmega.jpg filter=lfs diff=lfs merge=lfs -text
pics/diodesad2.png filter=lfs diff=lfs merge=lfs -text

1
.gitignore vendored
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@ -26,4 +26,3 @@
work-*.cf work-*.cf
svg-inkscape/ svg-inkscape/
/sections/core/entities/

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Diplomschrift.pdf
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README.md
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@ -18,7 +18,7 @@ however if you don't trust me, or want to check your installed latex
distribution, you can compile it yourself via the following commandline: distribution, you can compile it yourself via the following commandline:
```bash ```bash
xelatex --shell-escape main.tex lualatex --shell-escape main.tex
``` ```
The used latex distribution is the 2019.50876-1 version of the archlinux texlive The used latex distribution is the 2019.50876-1 version of the archlinux texlive

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charts/flowchart_textadv.tex Normal file
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@ -0,0 +1,366 @@
% Graphic for TeX using PGF
% Title: /home/tyrolyean/projects/hinzenhumpf3000/dipl/charts/flowchart_textadv.dia
% Creator: Dia v0.97.3
% CreationDate: Sat Mar 28 00:16:36 2020
% For: tyrolyean
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[0] Config.pm:304> INFO - This is Biber 2.13
[0] Config.pm:307> INFO - Logfile is 'main.blg'
[28] biber:315> INFO - === Fri Mar 27, 2020, 13:01:57
[44] Biber.pm:375> INFO - Reading 'main.bcf'
[102] Biber.pm:905> INFO - Found 30 citekeys in bib section 0
[113] Biber.pm:4196> INFO - Processing section 0
[113] Utils.pm:75> INFO - Globbing data source './bibliographies/DP.bib'
[114] Utils.pm:91> INFO - Globbed data source './bibliographies/DP.bib' to ./bibliographies/DP.bib
[114] Utils.pm:75> INFO - Globbing data source './bibliographies/AB.bib'
[114] Utils.pm:91> INFO - Globbed data source './bibliographies/AB.bib' to ./bibliographies/AB.bib
[124] Biber.pm:4373> INFO - Looking for bibtex format file './bibliographies/DP.bib' for section 0
[125] bibtex.pm:1462> INFO - LaTeX decoding ...
[140] bibtex.pm:1281> INFO - Found BibTeX data source './bibliographies/DP.bib'
[159] Biber.pm:4373> INFO - Looking for bibtex format file './bibliographies/AB.bib' for section 0
[160] bibtex.pm:1462> INFO - LaTeX decoding ...
[165] bibtex.pm:1281> INFO - Found BibTeX data source './bibliographies/AB.bib'
[216] UCollate.pm:68> INFO - Overriding locale 'de-DE' defaults 'normalization = NFD' with 'normalization = prenormalized'
[216] UCollate.pm:68> INFO - Overriding locale 'de-DE' defaults 'variable = shifted' with 'variable = non-ignorable'
[216] Biber.pm:4024> INFO - Sorting list 'none/global//global/global' of type 'entry' with template 'none' and locale 'de-DE'
[216] Biber.pm:4030> INFO - No sort tailoring available for locale 'de-DE'
[241] bbl.pm:648> INFO - Writing 'main.bbl' with encoding 'UTF-8'
[249] bbl.pm:751> INFO - Output to main.bbl

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\contentsline {figure}{\numberline {i}{\ignorespaces Atari PBI Pinout;Source: \url {https://www.atarimagazines.com}\relax }}{2}{figure.caption.1}%
\contentsline {figure}{\numberline {ii}{\ignorespaces Digilent Analog Discovery 2;Source: \url {https://www.sparkfun.com/}\relax }}{5}{figure.caption.2}%
\contentsline {figure}{\numberline {iii}{\ignorespaces Layout of the DIN41612 Connectors on the Backplane\relax }}{6}{figure.caption.3}%
\contentsline {figure}{\numberline {iv}{\ignorespaces Measurement at around 1MHz bus clock on MS1\relax }}{7}{figure.caption.4}%
\contentsline {figure}{\numberline {v}{\ignorespaces The case with installed backplane\relax }}{8}{figure.caption.5}%
\contentsline {figure}{\numberline {vi}{\ignorespaces PC-16550D Pinout\cite {pc16550}\relax }}{9}{figure.caption.6}%
\contentsline {figure}{\numberline {vii}{\ignorespaces The schematic of the UART Module\relax }}{11}{figure.caption.7}%
\contentsline {figure}{\numberline {viii}{\ignorespaces Measurement of the 1.8432 MHz Output on J1\relax }}{12}{figure.caption.8}%
\contentsline {figure}{\numberline {ix}{\ignorespaces Measurement of a character transmission before and after MAX-232\relax }}{13}{figure.caption.9}%
\contentsline {figure}{\numberline {x}{\ignorespaces Pinout of the RJ-45 Plug; Src: \url {https://www.wti.com/}\relax }}{13}{figure.caption.10}%
\contentsline {figure}{\numberline {xi}{\ignorespaces Measurement of a character echo\relax }}{14}{figure.caption.11}%
\contentsline {figure}{\numberline {xii}{\ignorespaces Transmission of character A via the 16550 UART\relax }}{17}{figure.caption.12}%
\contentsline {figure}{\numberline {xiii}{\ignorespaces TLC-7528 Pinout\cite {tlc7528}\relax }}{19}{figure.caption.13}%
\contentsline {figure}{\numberline {xiv}{\ignorespaces IDT-7201 Pinout\cite {idt7201}\relax }}{20}{figure.caption.14}%
\contentsline {figure}{\numberline {xv}{\ignorespaces TLC-7528 in voltage modet\cite {tlc7528}\relax }}{21}{figure.caption.15}%
\contentsline {figure}{\numberline {xvi}{\ignorespaces Measurement of a generated SAW signal via the TLC7528\relax }}{21}{figure.caption.16}%
\contentsline {figure}{\numberline {xvii}{\ignorespaces The schematic of the DAC Module\relax }}{22}{figure.caption.17}%
\contentsline {figure}{\numberline {xviii}{\ignorespaces Measurement of a generated SAW signal with the FIFO Empty flag\relax }}{24}{figure.caption.18}%
\contentsline {figure}{\numberline {xix}{\ignorespaces A transmission between the FIFO and the DAC\relax }}{25}{figure.caption.19}%
\contentsline {figure}{\numberline {xx}{\ignorespaces A fifo store operation in contrast to the load operation\relax }}{25}{figure.caption.20}%
\contentsline {figure}{\numberline {xxi}{\ignorespaces Storage and retrieval of a sine to and from the FIFO\relax }}{27}{figure.caption.21}%
\contentsline {figure}{\numberline {xxii}{\ignorespaces Measuremet of the generated sine from the sine LUT on DACA and DACB\relax }}{27}{figure.caption.22}%
\contentsline {figure}{\numberline {xxiii}{\ignorespaces 3.3V to 5V conversion using the level shifter\relax }}{29}{figure.caption.23}%
\contentsline {figure}{\numberline {xxiv}{\ignorespaces 5V to 3.3V conversion using the level shifter\relax }}{30}{figure.caption.24}%
\contentsline {figure}{\numberline {xxv}{\ignorespaces The internal schematics of the level shifter\cite {lvlshift}\relax }}{30}{figure.caption.25}%
\contentsline {figure}{\numberline {xxvi}{\ignorespaces The internal clamping diodes of the Analog Discovery 2\cite {ad2}\relax }}{31}{figure.caption.26}%
\contentsline {figure}{\numberline {xxvii}{\ignorespaces The output of an example track part 1\relax }}{42}{figure.caption.27}%
\contentsline {figure}{\numberline {xxviii}{\ignorespaces The output of an example track part 2\relax }}{43}{figure.caption.28}%
\contentsline {figure}{\numberline {xxix}{\ignorespaces A regular beginning of the game\relax }}{48}{figure.caption.29}%
\contentsline {figure}{\numberline {xxx}{\ignorespaces Screenshot of the resulting waveform in GTKWave\relax }}{53}{figure.caption.30}%
\contentsline {figure}{\numberline {xxxi}{\ignorespaces Block diagram of the video core\relax }}{58}{figure.caption.31}%
\contentsline {figure}{\numberline {xxxii}{\ignorespaces Diagram of VGA timing intervals\relax }}{59}{figure.caption.32}%
\contentsline {figure}{\numberline {xxxiii}{\ignorespaces Block diagram of the text renderer\relax }}{60}{figure.caption.33}%
\contentsline {figure}{\numberline {xxxiv}{\ignorespaces Block diagram of the WS2812 driver\relax }}{60}{figure.caption.34}%
\contentsline {figure}{\numberline {xxxv}{\ignorespaces Timing diagram for the WS2812 serial protocol\relax }}{61}{figure.caption.35}%
\contentsline {figure}{\numberline {xxxvi}{\ignorespaces Block diagram of the CPU core\relax }}{63}{figure.caption.36}%
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\contentsline {lstlisting}{\numberline {I}Read and write routines for the 16550 UART}{14}{lstlisting.1}%
\contentsline {lstlisting}{\numberline {II}16550 INIT routines and single char transmission}{16}{lstlisting.2}%
\contentsline {lstlisting}{\numberline {III}16550 character echo}{18}{lstlisting.3}%
\contentsline {lstlisting}{\numberline {IV}SAW Generation for the DAC with FIFO}{25}{lstlisting.4}%
\contentsline {lstlisting}{\numberline {V}Sine LUT Generation}{26}{lstlisting.5}%
\contentsline {lstlisting}{\numberline {VI}DAC Sine Generation}{26}{lstlisting.6}%
\contentsline {lstlisting}{\numberline {VII}The avr.h header file}{33}{lstlisting.7}%
\contentsline {lstlisting}{\numberline {VIII}The routine function looped by the main}{34}{lstlisting.8}%
\contentsline {lstlisting}{\numberline {IX}The routine function for the UART}{35}{lstlisting.9}%
\contentsline {lstlisting}{\numberline {X}The routine function for the DAC}{35}{lstlisting.10}%
\contentsline {lstlisting}{\numberline {XI}The DAC operation modes}{36}{lstlisting.11}%
\contentsline {lstlisting}{\numberline {XII}The DAC waveform generation code}{37}{lstlisting.12}%
\contentsline {lstlisting}{\numberline {XIII}The ISR which fires every millisecond}{40}{lstlisting.13}%
\contentsline {lstlisting}{\numberline {XIV}The sound update function}{40}{lstlisting.14}%
\contentsline {lstlisting}{\numberline {XV}The character ingest function}{44}{lstlisting.15}%
\contentsline {lstlisting}{\numberline {XVI}The command parsing function}{45}{lstlisting.16}%
\contentsline {lstlisting}{\numberline {XVII}The command execution routine}{46}{lstlisting.17}%
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1
main.tex
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@ -92,6 +92,7 @@ geschlechtsunabh"angig verstanden werden soll.
%==================================================================================== %====================================================================================
\clearpage\vfill\newpage{} \clearpage\vfill\newpage{}
\selectlanguage{english}
%==================================================================================== %====================================================================================
\subsection*{Kurzfassung/Abstract\markboth{}{Kurzfassung/Abstract}} \subsection*{Kurzfassung/Abstract\markboth{}{Kurzfassung/Abstract}}
\addcontentsline{toc}{section}{Kurzfassung/Abstract} \addcontentsline{toc}{section}{Kurzfassung/Abstract}

100
main.toc
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@ -1,100 +0,0 @@
\babel@toc {english}{}
\boolfalse {citerequest}\boolfalse {citetracker}\boolfalse {pagetracker}\boolfalse {backtracker}\relax
\babel@toc {ngerman}{}
\babel@toc {ngerman}{}
\contentsline {section}{Gendererklärung}{i}{Doc-Start}%
\contentsline {section}{Kurzfassung/Abstract}{ii}{Doc-Start}%
\babel@toc {ngerman}{}
\babel@toc {ngerman}{}
\contentsline {section}{Result}{iii}{Doc-Start}%
\babel@toc {english}{}
\contentsline {section}{\numberline {1}Task description}{1}{section.1}%
\contentsline {subsection}{\numberline {1.1}Hardware}{1}{subsection.1.1}%
\contentsline {section}{\numberline {2}Hardware peripherials}{2}{section.2}%
\contentsline {subsection}{\numberline {2.1}Parallel bus}{2}{subsection.2.1}%
\contentsline {subsubsection}{\numberline {2.1.1}Address Bus}{3}{subsubsection.2.1.1}%
\contentsline {subsection}{\numberline {2.2}Data Bus}{3}{subsection.2.2}%
\contentsline {subsection}{\numberline {2.3}Control Bus}{3}{subsection.2.3}%
\contentsline {subsubsection}{\numberline {2.3.1}Master Reset}{3}{subsubsection.2.3.1}%
\contentsline {subsubsection}{\numberline {2.3.2}Write Not}{4}{subsubsection.2.3.2}%
\contentsline {subsubsection}{\numberline {2.3.3}Read Not}{4}{subsubsection.2.3.3}%
\contentsline {subsubsection}{\numberline {2.3.4}Module Select 1 and 2 Not}{4}{subsubsection.2.3.4}%
\contentsline {subsection}{\numberline {2.4}Testing and Measurement}{4}{subsection.2.4}%
\contentsline {subsubsection}{\numberline {2.4.1}Measurements}{4}{subsubsection.2.4.1}%
\contentsline {subsubsection}{\numberline {2.4.2}Testing}{5}{subsubsection.2.4.2}%
\contentsline {subsection}{\numberline {2.5}Backplane}{5}{subsection.2.5}%
\contentsline {subsubsection}{\numberline {2.5.1}Termination resistors}{6}{subsubsection.2.5.1}%
\contentsline {subsection}{\numberline {2.6}Case}{7}{subsection.2.6}%
\contentsline {subsection}{\numberline {2.7}Serial Console}{9}{subsection.2.7}%
\contentsline {subsubsection}{\numberline {2.7.1}16550 UART}{9}{subsubsection.2.7.1}%
\contentsline {subsubsection}{\numberline {2.7.2}MAX-232}{10}{subsubsection.2.7.2}%
\contentsline {subsubsection}{\numberline {2.7.3}Schematics}{10}{subsubsection.2.7.3}%
\contentsline {paragraph}{Element Description}{12}{figure.caption.7}%
\contentsline {subsubsection}{\numberline {2.7.4}Demonstration Software}{14}{subsubsection.2.7.4}%
\contentsline {paragraph}{Transmit code}{14}{figure.caption.11}%
\contentsline {paragraph}{Echo code}{17}{figure.caption.12}%
\contentsline {subsection}{\numberline {2.8}Audio Digital-Analog-Converter}{18}{subsection.2.8}%
\contentsline {subsubsection}{\numberline {2.8.1}TLC 7528 Dual R2R Ladder DAC}{19}{subsubsection.2.8.1}%
\contentsline {subsubsection}{\numberline {2.8.2}IDT7201 CMOS FIFO Buffer}{19}{subsubsection.2.8.2}%
\contentsline {subsubsection}{\numberline {2.8.3}Theory verfication}{20}{subsubsection.2.8.3}%
\contentsline {subsubsection}{\numberline {2.8.4}Schematics}{21}{subsubsection.2.8.4}%
\contentsline {paragraph}{Element Description}{23}{figure.caption.17}%
\contentsline {paragraph}{NE55 Clock Source}{24}{figure.caption.17}%
\contentsline {subsubsection}{\numberline {2.8.5}Demonstration Software}{24}{subsubsection.2.8.5}%
\contentsline {paragraph}{SAW Generator}{24}{subsubsection.2.8.5}%
\contentsline {paragraph}{Sine Generator}{26}{lstnumber.4.11}%
\contentsline {section}{\numberline {3}Addressing DACA and DACB}{28}{section.3}%
\contentsline {subsection}{\numberline {3.1}FPGA to Hardware interface}{28}{subsection.3.1}%
\contentsline {subsubsection}{\numberline {3.1.1}Measurement error}{31}{subsubsection.3.1.1}%
\contentsline {section}{\numberline {4}Textadventure}{31}{section.4}%
\contentsline {subsection}{\numberline {4.1}General Implementation details}{32}{subsection.4.1}%
\contentsline {subsubsection}{\numberline {4.1.1}General definitions and pinout of the AVR}{32}{subsubsection.4.1.1}%
\contentsline {subsubsection}{\numberline {4.1.2}Read and Write routines}{34}{subsubsection.4.1.2}%
\contentsline {subsubsection}{\numberline {4.1.3}UART and DAC update polling}{34}{subsubsection.4.1.3}%
\contentsline {subsection}{\numberline {4.2}DAC sound generation}{35}{subsection.4.2}%
\contentsline {subsubsection}{\numberline {4.2.1}DAC modes}{35}{subsubsection.4.2.1}%
\contentsline {subsubsection}{\numberline {4.2.2}Tones and Tracks}{40}{subsubsection.4.2.2}%
\contentsline {subsubsection}{\numberline {4.2.3}Track switching}{44}{subsubsection.4.2.3}%
\contentsline {subsection}{\numberline {4.3}User command interpretation}{44}{subsection.4.3}%
\contentsline {subsubsection}{\numberline {4.3.1}Command structure and parsing}{44}{subsubsection.4.3.1}%
\contentsline {subsubsection}{\numberline {4.3.2}Command parameters}{46}{subsubsection.4.3.2}%
\contentsline {subsection}{\numberline {4.4}Gameplay}{47}{subsection.4.4}%
\contentsline {subsection}{\numberline {4.5}Memory constraints}{49}{subsection.4.5}%
\contentsline {part}{I\hspace {1em}A short introduction to VHDL}{50}{part.1}%
\contentsline {section}{\numberline {5}Prerequisites}{50}{section.5}%
\contentsline {section}{\numberline {6}Creating a design}{50}{section.6}%
\contentsline {section}{\numberline {7}Simulating a design}{52}{section.7}%
\contentsline {section}{\numberline {8}Synthesizing a design}{53}{section.8}%
\contentsline {part}{II\hspace {1em}Meta}{54}{part.2}%
\contentsline {section}{\numberline {9}History}{54}{section.9}%
\contentsline {section}{\numberline {10}Tooling}{56}{section.10}%
\contentsline {subsection}{\numberline {10.1}Vendor Tools}{56}{subsection.10.1}%
\contentsline {subsection}{\numberline {10.2}Free Software Tools}{56}{subsection.10.2}%
\contentsline {section}{\numberline {11}Peripherals}{57}{section.11}%
\contentsline {subsection}{\numberline {11.1}UART}{57}{subsection.11.1}%
\contentsline {subsection}{\numberline {11.2}DVI graphics}{57}{subsection.11.2}%
\contentsline {subsubsection}{\numberline {11.2.1}VGA timing}{57}{subsubsection.11.2.1}%
\contentsline {subsubsection}{\numberline {11.2.2}Text renderer}{58}{subsubsection.11.2.2}%
\contentsline {subsubsection}{\numberline {11.2.3}TMDS encoder}{59}{subsubsection.11.2.3}%
\contentsline {subsection}{\numberline {11.3}Ethernet}{59}{subsection.11.3}%
\contentsline {subsection}{\numberline {11.4}WS2812 driver}{60}{subsection.11.4}%
\contentsline {subsection}{\numberline {11.5}DRAM}{61}{subsection.11.5}%
\contentsline {subsection}{\numberline {11.6}External Bus}{61}{subsection.11.6}%
\contentsline {section}{\numberline {12}Testing}{62}{section.12}%
\contentsline {subsection}{\numberline {12.1}RISC-V Compliance Tests}{62}{subsection.12.1}%
\contentsline {part}{III\hspace {1em}The Core}{62}{part.3}%
\contentsline {section}{\numberline {13}Overview}{63}{section.13}%
\contentsline {section}{\numberline {14}Control}{63}{section.14}%
\contentsline {section}{\numberline {15}Decoder}{64}{section.15}%
\contentsline {section}{\numberline {16}Registers}{65}{section.16}%
\contentsline {section}{\numberline {17}Arithmetic and Logic Unit (ALU)}{66}{section.17}%
\contentsline {section}{\numberline {18}Control and Status Registers (CSR)}{66}{section.18}%
\contentsline {section}{\numberline {19}Memory Arbiter}{67}{section.19}%
\contentsline {section}{\numberline {20}Exception Control}{68}{section.20}%
\babel@toc {ngerman}{}
\contentsline {section}{\numberline {21}Erkl"arung der Eigenst"andigkeit der Arbeit}{70}{section.21}%
\babel@toc {english}{}
\contentsline {section}{\numberline {I\tmspace +\thickmuskip {.2777em}}List of Figures}{I}{section.1}%
\contentsline {section}{\numberline {II\tmspace +\thickmuskip {.2777em}}List of Tables}{II}{section.2}%
\contentsline {section}{\numberline {III\tmspace +\thickmuskip {.2777em}}Listings}{II}{section.3}%
\contentsline {section}{Anhang}{V}{section.3}%

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preamble.tex
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@ -177,7 +177,7 @@
\usepackage{tikz,pgfplots} \usepackage{tikz,pgfplots}
\usetikzlibrary{plotmarks} \usetikzlibrary{plotmarks}
\usetikzlibrary{angles,quotes,babel,shapes,arrows,positioning,calc} \usetikzlibrary{angles,quotes,babel,shapes,arrows,positioning,calc,automata}
\usepackage{tikz-timing} \usepackage{tikz-timing}
\tikzset{ \tikzset{
block/.style = {draw, fill=white, rectangle, minimum height=3em, minimum width=3em,align=center}, block/.style = {draw, fill=white, rectangle, minimum height=3em, minimum width=3em,align=center},
@ -209,6 +209,14 @@ minimum height=1cm, align=center, text width=3cm, draw=black, fill=blue!30]
\usepackage{blindtext} \usepackage{blindtext}
\usepackage{pgfgantt} \usepackage{pgfgantt}
\tikzset{->, % makes the edges directed
>=stealth, % makes the arrow heads bold
node distance=6cm, % specifies the minimum distance between two nodes. Change if necessary.
every state/.style={thick, fill=gray!10}, % sets the properties for each ’state’ node
initial text=$ $} % sets the text that appears on the start arrow
\usepackage{subcaption}
%%% Title formatting %%% Title formatting
\usepackage{titlesec} \usepackage{titlesec}
\titleformat{\section}{\normalfont\bfseries\scshape\fontsize{16pt}{19pt}\selectfont}{\thesection}{1em}{} \titleformat{\section}{\normalfont\bfseries\scshape\fontsize{16pt}{19pt}\selectfont}{\thesection}{1em}{}

18
sections/DP/MEAS_TEST/main.tex
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@ -29,3 +29,21 @@ peripherials, way of addressing pins (8 at a time) and availability.
\cite{atmega2560} All \cite{atmega2560} All
testing software was written for this ATMega and compiled using the avr-gcc testing software was written for this ATMega and compiled using the avr-gcc
from the GNU-Project. from the GNU-Project.
To fully test the developed modules on the backplane a seprate module for the
ATMega was developed, which can be seen in figure \ref{fig:atmega_mod}. The
ATMega is beneath the the black PCB \footnote{Printed circuit board} in the
center, which is an Arduino\texttrademark Mega. The Arduino\texttrademark is,
for all indends and purposes, only a breakout of the ATMega 2560 and has only
been used in that way. No parts of the Arduino\texttrademark IDE or other parts
of the Arduino\texttrademark software suite have been used, as they consume too
much memory and the abstraction models used are not compatiable with building
processor peripherials.
\begin{figure}[H]
\centering
\includegraphics[width=\textwidth, angle=0]{pics/atmega}
\caption{The ATMega 2560 module for the backplane}
\label{fig:atmega_mod}
\end{figure}

12
sections/DP/UART/main.tex
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@ -198,3 +198,15 @@ transmission code, as well as the read and write routines in listing
label={lst:16550-echo}, caption={16550 character echo}, label={lst:16550-echo}, caption={16550 character echo},
columns=flexible, style=cstyle, firstline=76, lastline=109] columns=flexible, style=cstyle, firstline=76, lastline=109]
{code/16550/echo/src/main.c} {code/16550/echo/src/main.c}
\subsubsection{Final Module}
The final module can be seen in figure \ref{fig:16550_mod} with the pc16550 UART
in the center and the MAX-232 above.
\begin{figure}[H]
\centering
\includegraphics[width=\textwidth, angle=0]{pics/uart}
\caption{The final uart module with the pc16550 uart in the center}
\label{fig:16550_mod}
\end{figure}

17
sections/DP/dac/main.tex
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@ -294,3 +294,20 @@ implementations on this unit.
On the audio jack DACA is mapped to the right channel and DACB to the left On the audio jack DACA is mapped to the right channel and DACB to the left
channel. channel.
\subsubsection{Final Module}
The final module can be seen in figure \ref{fig:dac_mod} with, from bottom to
top, the 74HC374 D-Flip-Flop, the IDT-7201 FIFO, the 74HC00 NAND-Gates, the
TLC-7528 DAC and the NE555 oszillator. The jumper on the left is the voltage
select and the jumper on the right the clock select. The two pin headers on the
top have been installed for voltage measurement on the left and right audio
channels while the audio jack is in use.
\begin{figure}[H]
\centering
\includegraphics[width=\textwidth, angle=90]{pics/dac}
\caption{The final DAC module}
\label{fig:dac_mod}
\end{figure}

77
sections/DP/textadv/main.tex
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@ -69,6 +69,21 @@ operation continues.
columns=flexible, style=cstyle, firstline=200, lastline=207] columns=flexible, style=cstyle, firstline=200, lastline=207]
{code/textadv/src/dac.c} {code/textadv/src/dac.c}
\subsubsection{Program execution path}
On microprocessors it is required to not leave a return path for programs, as
a return path would lead to the microcontroller either resetting, or seicing to
work until the next power cut. Therefore the program performs all it's tasks in
an infinte loop. This loop can be seen in listing \ref{lst:textadv-routine} and
in figure \ref{fig:textadv_pexfl}.
\begin{figure}[H]
\centering
\input{charts/flowchart_textadv.tex}
\caption{A Flow-Chart of the program execution path}
\label{fig:textadv_pexfl}
\end{figure}
\subsection{DAC sound generation} \subsection{DAC sound generation}
\subsubsection{DAC modes} \subsubsection{DAC modes}
@ -284,17 +299,71 @@ altering the map data and the strings output to the user.
\label{fig:tetadv_gameplay} \label{fig:tetadv_gameplay}
\end{figure} \end{figure}
\subsection{Memory constraints} \subsubsection{Memory constraints}
The AVR has 8kB of internal SRAM which are used for stack and heap The AVR has 8kB of internal SRAM which are used for stack and heap
\cite{atmega2560}. During the build of the program an ELF file can be obtained \cite{atmega2560}. During the build of the program an ELF file can be obtained
which contains infromation on the programs structure and memory usage on boot. which contains infromation on the programs structure and memory usage on boot.
Strings and variables are contained within the .data section of the elf file, Strings and variables are contained within the .data section of the elf file,
but loaded into the .bss section during boot\cite{elf}. This is done for and loaded into memory during boot\cite{elf}. This is done for integer
integer
variables, as well as for strings, which makes the use of strings limited not variables, as well as for strings, which makes the use of strings limited not
to the flash size but to the RAM size of the AVR. To save memory, sound tracks to the flash size but to the RAM size of the AVR. To save memory, sound tracks
as well as the sine and noise table have been put into program space with the as well as the sine and noise table have been put into program space with the
PROGMEM attribute as described by the avr-libc documentation\cite{progmem}. PROGMEM attribute as described by the avr-libc documentation\cite{progmem}.
In listing \ref{lst:textadv-dac-gen} a read from program memory can be seen in In listing \ref{lst:textadv-dac-gen} a read from program memory can be seen in
the noise and sine modes. the noise and sine modes. Strings have not been put into programmspace as this
would require each string to be declared independantly and then be put into
arrays\cite{progmem} as is done now, which would make the code much less
readable and increase overhead As well as make the usage of buffers nescessary
in order for the override of the printf function to work.
\subsubsection{Story}
The basics of the storyline are that you wake up in the middle of a forest and
don't remember anything. You have to get through the forest to an old house,
while having to get rid of a bear which is blocking the way. Inside the house
you have to get a computer to start. The game then proceeds to get recursive and
your goal is to break out of the recursion.
\subsubsection{Recursion}
The game, when performing the recursion, resets your inventory and internal
state machines, before putting you back to the starting point. However by
altering the orientation of rooms, altering the list of items found inside rooms
and by altering the texts output by the game, the atmosphere can be changed, and
the outcome changed.
\subsubsection{Computer State Machine}
One example of a state machine inside the game is the computer inside the
old-house. The computer needs three items: a keyboard to type on, something to
boot from, for example a floppy disk, and a screwdriver to start it. The state
machine implementation can be seen in listing \ref{lst:textadv-fsm} and the
state diagram in figure \ref{fig:textadv_compfsm}.
\lstinputlisting[language=C,frame=trBL,
breaklines=true, breakautoindent=true, formfeed=\newpage,
label={lst:textadv-fsm}, caption={The computer FSM},
columns=flexible, style=cstyle, firstline=288, lastline=327]
{code/textadv/src/game.c}
\begin{figure}[H]
\centering
\begin{tikzpicture}
\node[state, initial] (c1) {Nothing};
\node[state, right of=c1] (c2) {Keyboard};
\node[state, right of=c2] (c3) {Bootable};
\draw (c1) edge[loop above] node{else} (c1)
(c1) edge[above] node {keyboard} (c2)
(c2) edge[loop above] node{else} (c2)
(c2) edge[above] node{boot medium} (c3)
(c3) edge[loop above] node {else} (c3)
(c3) edge[bend left, below] node {screwdriver} (c1);
\end{tikzpicture}
\caption{A state diagram of the computer state machine}
\label{fig:textadv_compfsm}
\end{figure}

11
sections/result.tex
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@ -5,4 +5,13 @@ open-source programs and the RISC-V processor can compile using an open source
toolchain. The completed project can be found on the USB stick which accompanies toolchain. The completed project can be found on the USB stick which accompanies
this thesis, or in the git repositories at this thesis, or in the git repositories at
\url{https://git.it-syndikat.org/tyrolyean/dipl.git} and \url{https://git.it-syndikat.org/tyrolyean/dipl.git} and
\url{https://gitlab.com/YARM-project/}. \url{https://gitlab.com/YARM-project/}. The completed hardware peripherials can
be seen in figure \ref{fig:all_mod}
\begin{figure}[H]
\centering
\includegraphics[width=\textwidth, angle=180]{pics/all_mod}
\caption{An overview of the hardware peripherials}
\label{fig:all_mod}
\end{figure}

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endobj endobj
6 0 obj 6 0 obj
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endobj endobj
7 0 obj 7 0 obj

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