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@ -36,7 +36,7 @@ entity arty_a7 is
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-- when necessary
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pmod_a : out std_logic_vector(7 downto 0);
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pmod_b : out std_logic_vector(7 downto 0);
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pmod_c : in std_logic_vector(7 downto 0);
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pmod_c : out std_logic_vector(7 downto 0);
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pmod_d : out std_logic_vector(7 downto 0);
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clock_100mhz : in std_logic;
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@ -320,9 +320,20 @@ begin
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sys_reset <= not pll_locked or not n_reset;
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pmod_a <= drivers(7 downto 0);
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pmod_b <= drivers(15 downto 8);
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pmod_d <= drivers(23 downto 16);
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pmod_a <= "00" & drivers(5 downto 0);
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pmod_b <= "00" & drivers(11 downto 6);
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pmod_c(7) <= '0';
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pmod_c(6) <= '0';
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pmod_c(5) <= drivers(17);
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pmod_c(4) <= drivers(16);
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pmod_c(3) <= drivers(15);
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pmod_c(2) <= drivers(14);
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-- workaround for https://github.com/gatecat/nextpnr-xilinx/issues/42#issuecomment-1183525828
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pmod_c(1) <= drivers(12);
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pmod_c(0) <= drivers(13);
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pmod_d <= "00" & drivers(23 downto 18);
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sender: process(sys_clk)
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begin
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