Rework SoC outline

main.tex

@@ -132,7 +132,6 @@ geschlechtsunabh"angig verstanden werden soll.
 \DP\input{sections/DP/textadv/main.tex}
 \clearpage
 
-\part{FPGA-based System on Chip (SoC)}
 \AB\subfile{sections/soc/soc.tex}
 \AB\subfile{sections/core/core.tex}
 

sections/soc/soc.tex

@@ -1,7 +1,7 @@
 \documentclass[../../Diplomschrift.tex]{subfiles}
 
 \begin{document}
-\section{Development History}
+\section{FPGA Development}
 
 The project started out with the desire to build a CPU from scratch. Examples such as The NAND Game~\cite{nandgame} and Ben Eater's Breadboard Computer series~\cite{breadboard_computer} served as inspirations and guidance during development.
 
@@ -52,19 +52,19 @@ Others   & SD card, VGA & Ethernet \\
 
 While the Digilent board offers fewer IO options, the DDR3 memory can be interfaced using Free memory cores and allows for much larger programs to be loaded, possibly even a full operating system. The missing VGA port has been substituted by an HDMI-compatible DVI interface that is accessible through one of the high-speed PMOD connectors.
 
-\section{FPGA Tooling}
+\subsection{Tooling}
 
 FPGA design is done using a Hardware Description Language (HDL). The two most well-known HDLs are Verilog and VHDL (VHSIC (Very high speed integrated circuit) HDL). As part of our studies at HTL, we exclusively worked with VHDL. For this reason, and because VHDL offers a strong type system~\cite{vhdl-types}, it was selected as the language of choice for the project.
 
 To refresh the reader's memory on the VHDL language, and as a quick guide for the tools involved in this project, see Appendix~\ref{app:vhdl-intro}.
 
-\subsection{Vendor Tools}
+\subsubsection{Vendor Tools}
 
 The conventional way to work with FPGA designs is to use the FPGA vendor's development solution for simulation, synthesis and place-and-route. All of these tools are proprietary software specialized to a certain FPGA manufacturer, so a change of hardware also requires changing to a completely different software solution.
 
 Vendor tools are usually free-of-charge for basic usage, but this also means there is no guaranteed support. During the development of this project, several bugs and missing features were found in vendor tools that required workarounds.
 
-\subsection{Free Software Tools}
+\subsubsection{Free Software Tools}
 
 A somewhat recent development is the creation of Free Software\footnotemark{} FPGA toolchains. A breakthrough was achieved by Claire (formerly Clifford) Wolf in 2013 with yosys~\cite{yosys-paper, yosys}, a feature-complete Verilog synthesis suite for Lattice's \texttt{iCE40} FPGA series.
     \footnotetext{``Free Software'' refers to software that grants its user the freedom to share, study and modify it - see \url{https://www.fsf.org/about/what-is-free-software}.}
@@ -81,14 +81,13 @@ With these two pieces in place, the project was switched over to a completely Fr
  \item openFPGALoader is used to transfer the bitstream to the FPGA via JTAG
 \end{itemize}
 
-\section{Peripherals}
+\section{SoC Peripherals}
 
-The complete FPGA design consists not only of the CPU core, but a number of components that allow it to operate and communicate with the outside environment. They are connected using a shared 32-bit bus.
+The complete FPGA design consists not only of the CPU core, but a number of components that allow it to operate as well as to communicate with the outside environment. They are connected to the core using a shared 32-bit bus.
 
 \subsection{UART}
 
-The easiest way to communicate with an embedded system is usually through a serial interface. To ensure the best compatibility with existing software, a National Semiconductor 16550 UART was reimplemented from scratch instead of creating a new design. Thus, the modules's functionality and design can be found in the 16550's datasheet.
+The easiest way to communicate with an embedded system is usually through a serial interface. To ensure the best compatibility with existing software, a National Semiconductor 16550 UART was reimplemented from scratch instead of creating a new design. Thus, the modules's functionality and design can be found in the 16550's datasheet~\cite{pc16550}.
-% TODO ref
 
 \subsection{DVI graphics}