20 lines
444 B
VHDL
20 lines
444 B
VHDL
|
entity multiplier is
|
||
|
|
generic (
|
||
|
|
-- A shorter than B: faster, but wider adder required
|
||
|
|
WIDTH_A : positive;
|
||
|
|
WIDTH_B : positive
|
||
|
|
|
||
|
|
--PARALLELISM : positive
|
||
|
|
);
|
||
|
|
port (
|
||
|
|
clk : in std_logic;
|
||
|
|
|
||
|
|
run : in std_logic;
|
||
|
|
valid : out std_logic;
|
||
|
|
mul_signed : in std_logic;
|
||
|
|
|
||
|
|
a : in std_logic_vector(WIDTH_A-1 downto 0);
|
||
|
|
b : in std_logic_vector(WIDTH_B-1 downto 0);
|
||
|
|
result : out std_logic_vector(WIDTH_A+WIDTH_B-1 downto 0)
|
||
|
|
);
|
||
|
|
end multiplier;
|