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base: xiretza:23f0ad777f499099e3ea0a2ec4d37c25d94d345e
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xiretza:liteeth-wishbone
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compare: xiretza:d2a18e19e54102cab4221859c0a0affe2292796b
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2 commits
23f0ad777f ... d2a18e19e5

Author SHA1 Message Date
Xiretza
d2a18e19e5 fix: work around ghdl memory inference 2022-06-20 12:01:50 +02:00
Xiretza
c47f81c504 fix: work around ghdl#2078 2022-06-20 12:01:50 +02:00
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vhdl/splink.vhdl
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@ -184,7 +184,6 @@ begin
-- workaround for ghdl#2078 -- workaround for ghdl#2078
if reset = '0' and udp_valid = '1' and receive_state = DATA then if reset = '0' and udp_valid = '1' and receive_state = DATA then
-- workaround for ghdl#2102
for i in 0 to NUM_STRANDS-1 loop for i in 0 to NUM_STRANDS-1 loop
if i = active_strand then if i = active_strand then
if input_bank = BANK_A then if input_bank = BANK_A then