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fix: use parallel ws2812 driver

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Xiretza 2022-06-18 17:24:47 +02:00
parent 6ff0e77d38
commit e8476445b2
2 changed files with 39 additions and 34 deletions
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71
vhdl/splink.vhdl
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@ -2,6 +2,9 @@ library ieee;
use ieee.std_logic_1164.all; use ieee.std_logic_1164.all;
use ieee.numeric_std.all; use ieee.numeric_std.all;
use work.ws2812_pkg.color_t;
use work.ws2812_pkg.colors_vector;
entity splink is entity splink is
generic ( generic (
NUM_STRANDS : positive; NUM_STRANDS : positive;
@ -24,12 +27,11 @@ end entity;
architecture a of splink is architecture a of splink is
constant BITS_PER_LED: natural := 24; constant BITS_PER_LED: natural := 24;
subtype color_t is std_logic_vector(BITS_PER_LED-1 downto 0);
signal led_addr : std_logic_vector(7 downto 0);
signal led_colors : colors_vector(NUM_STRANDS-1 downto 0);
type led_data_t is record type led_data_t is record
addr : std_logic_vector(7 downto 0);
current_color : color_t;
was_written : std_logic; was_written : std_logic;
end record; end record;
@ -56,43 +58,46 @@ architecture a of splink is
constant RESET_STATE : receive_state_t := MAGIC; constant RESET_STATE : receive_state_t := MAGIC;
signal receive_state : receive_state_t; signal receive_state : receive_state_t;
begin begin
ws2812_inst: entity work.ws2812_parallel
generic map (
NUM_DRIVERS => NUM_STRANDS,
NUM_LEDS => MAX_STRAND_LEN,
COLOR_ORDER => "GRB",
T_CLK => 12.5 ns,
T0H => 0.35 us,
T0L => 0.9 us,
T1H => 0.7 us,
T1L => 0.55 us,
T_RES => 80 us
)
port map (
n_reset => not reset,
clk => clk,
run => run,
led_addr => led_addr,
led_colors => led_colors,
dout => drivers
);
driver_gen: for i in 0 to NUM_STRANDS-1 generate driver_gen: for i in 0 to NUM_STRANDS-1 generate
ws2812_inst: entity work.ws2812
generic map (
NUM_LEDS => MAX_STRAND_LEN,
COLOR_ORDER => "GRB",
T_CLK => 12.5 ns,
T0H => 0.35 us,
T0L => 0.8 us,
T1H => 0.7 us,
T1L => 0.6 us,
T_RES => 80 us
)
port map (
n_reset => not reset,
clk => clk,
run => run,
led_addr => led_data_arr(i).addr,
led_red => led_data_arr(i).current_color(23 downto 16),
led_green => led_data_arr(i).current_color(15 downto 8),
led_blue => led_data_arr(i).current_color(7 downto 0),
dout => drivers(i)
);
writer: process(clk) writer: process(clk)
type strand_store_t is array(0 to MAX_STRAND_LEN-1) of color_t; type strand_store_t is array(0 to MAX_STRAND_LEN-1) of color_t;
variable strand_store: strand_store_t; variable strand_store: strand_store_t;
begin begin
if rising_edge(clk) then if rising_edge(clk) then
led_data_arr(i).current_color <= strand_store(to_integer(unsigned(led_data_arr(i).addr))); led_colors(i) <= strand_store(to_integer(unsigned(led_addr)));
if udp_valid = '1' and receive_state = DATA and active_strand = i then if udp_valid = '1' and receive_state = DATA and active_strand = i then
strand_store(pixels_received) := udp_data(23 downto 0); strand_store(pixels_received) := (
red => udp_data(23 downto 16),
green => udp_data(15 downto 8),
blue => udp_data(7 downto 0)
);
if pixels_received = num_pixels - 1 and udp_last = '1' then if pixels_received = num_pixels - 1 and udp_last = '1' then
led_data_arr(i).was_written <= '1'; led_data_arr(i).was_written <= '1';

2
vhdl/ws2812_vhdl

@ -1 +1 @@
Subproject commit 0d4146d3a3abeb6a20f9228e61e58f95a71b340a Subproject commit 7232f6606ddbcb099f1723506d95f27b3058e243