diff --git a/vhdl/splink.vhdl b/vhdl/splink.vhdl
index 2beb403..6e98735 100644
--- a/vhdl/splink.vhdl
+++ b/vhdl/splink.vhdl
@@ -168,12 +168,6 @@ begin
 						receive_state <= DATA;
 
 					when DATA =>
-						if input_bank = BANK_A then
-							strand_buffer_a(pixels_received)((active_strand+1) * BITS_PER_LED - 1 downto active_strand * BITS_PER_LED) := udp_data(23 downto 0);
-						else
-							strand_buffer_b(pixels_received)((active_strand+1) * BITS_PER_LED - 1 downto active_strand * BITS_PER_LED) := udp_data(23 downto 0);
-						end if;
-
 						if pixels_received /= num_pixels - 1 then
 							pixels_received <= pixels_received + 1;
 						elsif udp_last then
@@ -187,6 +181,15 @@ begin
 						-- wait until udp_last
 				end case;
 			end if;
+
+			-- workaround for ghdl#2078
+			if reset = '0' and udp_valid = '1' and receive_state = DATA then
+				if input_bank = BANK_A then
+					strand_buffer_a(pixels_received)((active_strand+1) * BITS_PER_LED - 1 downto active_strand * BITS_PER_LED) := udp_data(23 downto 0);
+				else
+					strand_buffer_b(pixels_received)((active_strand+1) * BITS_PER_LED - 1 downto active_strand * BITS_PER_LED) := udp_data(23 downto 0);
+				end if;
+			end if;
 		end if;
 	end process;
 end architecture;