From 79fce1afc1afd547269f99cc959ada062a523b02 Mon Sep 17 00:00:00 2001
From: Xiretza <xiretza@xiretza.xyz>
Date: Sun, 5 Jun 2022 21:35:50 +0200
Subject: [PATCH] vhdl: disable test UDP sender

---
 vhdl/arty_a7.vhdl | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/vhdl/arty_a7.vhdl b/vhdl/arty_a7.vhdl
index 061690a..933b5ff 100644
--- a/vhdl/arty_a7.vhdl
+++ b/vhdl/arty_a7.vhdl
@@ -307,7 +307,7 @@ begin
 			if counter = COUNTER_MAX then
 				pixel_sink_length <= std_logic_vector(to_unsigned(NUM_WORDS, 16));
 				pixel_sink_data <= std_logic_vector(to_unsigned(16#30# + words_sent, 32));
-				pixel_sink_valid <= '1';
+				--pixel_sink_valid <= '1';
 
 				pixel_sink_last <= '1' when words_sent = NUM_WORDS-1 else '0';