vhdl: reorganize receive FSM to avoid ghdl issues
https://github.com/ghdl/ghdl/issues/2077 https://github.com/ghdl/ghdl/issues/2078
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1 changed files with 57 additions and 37 deletions
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@ -34,6 +34,14 @@ architecture a of splink is
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type led_data_arr_t is array(0 to NUM_STRANDS-1) of led_data_t;
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signal led_data_arr : led_data_arr_t;
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signal active_strand: natural range 0 to NUM_STRANDS-1;
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signal num_pixels: natural range 1 to MAX_STRAND_LEN;
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signal frame_number: unsigned(31 downto 0);
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signal pixels_received: natural range 0 to MAX_STRAND_LEN-1;
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type receive_state_t is (FRAME_NUM, STRAND_NUM, DATA, DROP);
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signal receive_state : receive_state_t;
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begin
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driver_gen: for i in 0 to NUM_STRANDS-1 generate
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ws2812_inst: entity work.ws2812
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@ -61,66 +69,78 @@ begin
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dout => drivers(i)
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);
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writer: process(clk)
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type strand_store_t is array(0 to MAX_STRAND_LEN-1) of color_t;
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variable strand_store: strand_store_t;
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begin
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if rising_edge(clk) then
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led_data_arr(i).current_color <= strand_store(to_integer(unsigned(led_data_arr(i).addr)));
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if udp_valid = '1' and receive_state = DATA and active_strand = i then
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strand_store(pixels_received) := udp_data(23 downto 0);
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if pixels_received = num_pixels - 1 and udp_last = '1' then
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led_data_arr(i).was_written <= '1';
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end if;
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end if;
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if frame_done then
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led_data_arr(i).was_written <= '0';
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end if;
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end if;
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end process;
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end generate;
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writer: process(clk)
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type strand_store_t is array(0 to MAX_STRAND_LEN-1) of color_t;
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type strand_stores_t is array(0 to NUM_STRANDS-1) of strand_store_t;
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variable strand_stores: strand_stores_t;
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process(led_data_arr)
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begin
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frame_done <= '1';
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variable active_strand: natural range 0 to NUM_STRANDS-1;
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variable packet_len: natural range 1 to MAX_STRAND_LEN;
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variable frame_number: unsigned(31 downto 0);
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variable store_counter: natural range 0 to MAX_STRAND_LEN-1;
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for i in 0 to NUM_STRANDS-1 loop
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if not led_data_arr(i).was_written then
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frame_done <= '0';
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end if;
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end loop;
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end process;
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type receive_state_t is (FRAME_NUM, STRAND_NUM, DATA, DROP);
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variable receive_state : receive_state_t;
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fsm: process(clk)
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begin
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if rising_edge(clk) then
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frame_done <= '0';
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if reset then
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receive_state <= STRAND_NUM;
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elsif udp_valid then
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if udp_last then
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-- always resynchronize to start of packet
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receive_state <= STRAND_NUM;
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end if;
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for i in 0 to NUM_STRANDS-1 loop
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led_data_arr(i).current_color <= strand_stores(i)(to_integer(unsigned(led_data_arr(i).addr)));
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end loop;
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if udp_valid then
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case receive_state is
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when STRAND_NUM =>
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-- TODO udp_length, range check with MAX_STRAND_LEN
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packet_len := MAX_STRAND_LEN;
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num_pixels <= MAX_STRAND_LEN;
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-- FIXME bounds check
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active_strand := to_integer(unsigned(udp_data));
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active_strand <= to_integer(unsigned(udp_data));
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receive_state := FRAME_NUM;
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receive_state <= FRAME_NUM;
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when FRAME_NUM =>
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frame_number := unsigned(udp_data);
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frame_number <= unsigned(udp_data);
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store_counter := 0;
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receive_state := DATA;
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pixels_received <= 0;
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receive_state <= DATA;
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when DATA =>
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strand_stores(active_strand)(store_counter) := udp_data(23 downto 0);
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if store_counter = packet_len then
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if udp_last then
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--led_data_arr(active_strand).was_written <= '1';
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else
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-- packet too long
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receive_state := DROP;
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end if;
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else
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store_counter := store_counter + 1;
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if pixels_received /= num_pixels - 1 then
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pixels_received <= pixels_received + 1;
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elsif not udp_last then
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-- packet too long
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receive_state <= DROP;
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end if;
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when DROP =>
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-- wait until udp_last
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end case;
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if udp_last then
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receive_state := STRAND_NUM;
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end if;
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end if;
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end if;
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end process;
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