aoc2020/day2/vhdl/run.sh

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#!/usr/bin/env sh
set -eu
INPUT=$1
GHDLFLAGS="--std=08 --workdir=workdir"
mkdir -p workdir
ghdl remove $GHDLFLAGS
ghdl analyze $GHDLFLAGS parser.vhd verifier.vhd top.vhd sim.vhd
ghdl elab-run $GHDLFLAGS sim -gSTEP=1 < "$INPUT"
ghdl elab-run $GHDLFLAGS sim -gSTEP=2 < "$INPUT"
echo "Synthesized: "
for step in 1 2; do
ghdl remove $GHDLFLAGS
ghdl synth $GHDLFLAGS -gCOUNTER_WIDTH=12 -gSTEP="$step" parser.vhd verifier.vhd top.vhd -e top > top_syn.vhd
ghdl analyze $GHDLFLAGS top_syn.vhd sim.vhd
ghdl elab-run $GHDLFLAGS sim -gSTEP="$step" --ieee-asserts=disable < "$INPUT"
done