day2/vhdl/parser.vhd

@@ -30,7 +30,7 @@ architecture behaviour of parser is
 
 	function char_to_digit(input : in character) return digit is
 	begin
-		if not (input < '0') and input <= '9' then
+		if input >= '0' and input <= '9' then
 			return character'pos(input) - character'pos('0');
 		else
 			return 0;

day2/vhdl/run.sh

@@ -2,20 +2,8 @@
 
 set -eu
 
-GHDLFLAGS="--std=08 --workdir=workdir"
-
 mkdir -p workdir
 
-ghdl remove $GHDLFLAGS
-ghdl analyze $GHDLFLAGS parser.vhd verifier.vhd top.vhd sim.vhd
-ghdl elab-run $GHDLFLAGS sim -gSTEP=1 -gFILENAME="../input.txt"
-ghdl elab-run $GHDLFLAGS sim -gSTEP=2 -gFILENAME="../input.txt"
-
-echo "Synthesized: "
-
-for step in 1 2; do
-	ghdl remove $GHDLFLAGS
-	ghdl synth $GHDLFLAGS -gCOUNTER_WIDTH=12 -gSTEP="$step" parser.vhd verifier.vhd top.vhd -e top > top_syn.vhd
-	ghdl analyze $GHDLFLAGS top_syn.vhd sim.vhd
-	ghdl elab-run $GHDLFLAGS sim -gSTEP="$step" -gFILENAME="../input.txt" --ieee-asserts=disable-at-0
-done
+ghdl analyze --std=08 --workdir=workdir parser.vhd verifier.vhd top.vhd sim.vhd
+ghdl elab-run --std=08 --workdir=workdir sim -gSTEP=1 -gFILENAME="../input.txt"
+ghdl elab-run --std=08 --workdir=workdir sim -gSTEP=2 -gFILENAME="../input.txt"