diff --git a/day2/vhdl/run.sh b/day2/vhdl/run.sh
index db3d140..7ab777d 100755
--- a/day2/vhdl/run.sh
+++ b/day2/vhdl/run.sh
@@ -2,8 +2,20 @@
 
 set -eu
 
+GHDLFLAGS="--std=08 --workdir=workdir"
+
 mkdir -p workdir
 
-ghdl analyze --std=08 --workdir=workdir parser.vhd verifier.vhd top.vhd sim.vhd
-ghdl elab-run --std=08 --workdir=workdir sim -gSTEP=1 -gFILENAME="../input.txt"
-ghdl elab-run --std=08 --workdir=workdir sim -gSTEP=2 -gFILENAME="../input.txt"
+ghdl remove $GHDLFLAGS
+ghdl analyze $GHDLFLAGS parser.vhd verifier.vhd top.vhd sim.vhd
+ghdl elab-run $GHDLFLAGS sim -gSTEP=1 -gFILENAME="../input.txt"
+ghdl elab-run $GHDLFLAGS sim -gSTEP=2 -gFILENAME="../input.txt"
+
+echo "Synthesized: "
+
+for step in 1 2; do
+	ghdl remove $GHDLFLAGS
+	ghdl synth $GHDLFLAGS -gCOUNTER_WIDTH=12 -gSTEP="$step" parser.vhd verifier.vhd top.vhd -e top > top_syn.vhd
+	ghdl analyze $GHDLFLAGS top_syn.vhd sim.vhd
+	ghdl elab-run $GHDLFLAGS sim -gSTEP="$step" -gFILENAME="../input.txt" --ieee-asserts=disable-at-0
+done