common: add VHDL testbench and runner
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parent
dbcf8fa588
commit
d60b8c5371
4 changed files with 37 additions and 24 deletions
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@ -1,27 +1,8 @@
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#!/usr/bin/bash
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#!/bin/bash
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set -eu
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source "$COMMON_DIR/vhdl_run.sh"
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INPUT=$(readlink --canonicalize-existing "$1")
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MODE=${2:-}
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workdir=workdir
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GHDLFLAGS="--std=08 --workdir=$workdir"
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cd "$(dirname "${BASH_SOURCE[0]}")"
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cd "$(dirname "${BASH_SOURCE[0]}")"
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mkdir -p workdir
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DUT_OUTPUT_WIDTH=12
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test_synth day2 parser.vhdl verifier.vhdl top.vhdl
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if [[ $MODE = "--synth" ]]; then
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for step in 1 2; do
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ghdl remove $GHDLFLAGS
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ghdl synth $GHDLFLAGS -gCOUNTER_WIDTH=12 -gSTEP="$step" parser.vhd verifier.vhd top.vhd -e top > top_syn.vhd 2>/dev/null
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ghdl analyze $GHDLFLAGS top_syn.vhd sim.vhd day2.vhdl
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ghdl elab-run $GHDLFLAGS day2 -gSTEP="$step" --wave="$workdir/synth$step.ghw" --ieee-asserts=disable < "$INPUT"
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done
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else
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ghdl remove $GHDLFLAGS
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ghdl analyze $GHDLFLAGS parser.vhd verifier.vhd top.vhd sim.vhd day2.vhd
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for step in 1 2; do
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ghdl elab-run $GHDLFLAGS day2 -gSTEP="$step" --wave="$workdir/sim$step.ghw" < "$INPUT"
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done
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fi
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@ -6,7 +6,7 @@ use std.textio.all;
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entity sim is
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entity sim is
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generic (
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generic (
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OUTPUT_WIDTH : positive := 12;
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OUTPUT_WIDTH : positive;
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STEP : natural range 1 to 2
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STEP : natural range 1 to 2
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);
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);
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end entity;
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end entity;
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30
common/vhdl_run.sh
Executable file
30
common/vhdl_run.sh
Executable file
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@ -0,0 +1,30 @@
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#!/usr/bin/bash
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set -euo pipefail
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INPUT=$(readlink --canonicalize-existing "$1")
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workdir=workdir
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GHDLFLAGS="--std=08 --workdir=$workdir"
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mkdir -p workdir
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test_synth() {
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local config_name=$1; shift
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for step in 1 2; do
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ghdl remove $GHDLFLAGS
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ghdl synth $GHDLFLAGS -gOUTPUT_WIDTH="$DUT_OUTPUT_WIDTH" -gSTEP="$step" "$@" -e top > "$workdir/top_syn.vhdl" 2>/dev/null
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ghdl analyze $GHDLFLAGS "$workdir/top_syn.vhdl" "$COMMON_DIR/testbench.vhdl" "$config_name.vhdl"
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ghdl elab-run $GHDLFLAGS "$config_name" -gOUTPUT_WIDTH="$DUT_OUTPUT_WIDTH" --wave="$workdir/synth$step.ghw" --ieee-asserts=disable < "$INPUT"
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done
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}
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test_sim() {
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local config_name=$1; shift
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ghdl remove $GHDLFLAGS
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ghdl analyze $GHDLFLAGS "$COMMON_DIR/testbench.vhdl" "$@" "$config_name.vhdl"
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for step in 1 2; do
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ghdl elab-run $GHDLFLAGS "$config_name" -gOUTPUT_WIDTH="$DUT_OUTPUT_WIDTH" -gSTEP="$step" --wave="$workdir/sim$step.ghw" < "$INPUT"
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done
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}
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2
test.sh
2
test.sh
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@ -6,6 +6,8 @@ cd "$(dirname "${BASH_SOURCE[0]}")"
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YEAR=2020
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YEAR=2020
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export COMMON_DIR="$(realpath common)"
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run_solution() {
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run_solution() {
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if [ -d "$solution" ]; then
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if [ -d "$solution" ]; then
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if [ -f "$solution/Cargo.toml" ]; then
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if [ -f "$solution/Cargo.toml" ]; then
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