/* Copyright (C) 2020 tyrolyean * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program. If not, see . */ #ifndef _AVR_H_TEXT #define _AVR_H_TEXT #define F_CPU 16000000UL #include /* Shift values for the peripherials on the control bus PORTL */ #define MR_SHIFT 0 #define WR_SHIFT 1 #define RD_SHIFT 2 #define CS_UART_SHIFT 3 #define CS_DAC_SHIFT 4 #define ADDR_REG PORTK #define DATA_REG PORTF #define CTRL_REG PORTL #define ADDR_DDR_REG DDRK #define DATA_DDR_REG DDRF #define CTRL_DDR_REG DDRL /* Included here to prevent accidental redefinition of F_CPU */ #include /* Time it takes for the bus lanes to become stable for read and write access */ #define BUS_HOLD_US 1 void set_addr(uint8_t addr); #endif