dipl/code/textadv/src/16550.c
Tyrolyean a78cc80bb2
Added stuff from corona start
Signed-off-by: Tyrolyean <tyrolyean@tyrolyean.net>
2020-03-14 22:30:05 +01:00

80 lines
2.1 KiB
C

/* Copyright © 2020 tyrolyean
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include "avr.h"
#include "16550.h"
#include "structures.h"
#include <stdio.h>
static FILE stdout_16550 = FDEV_SETUP_STREAM(putchar_16550, NULL,
_FDEV_SETUP_WRITE);
void write_to_uart(uint8_t addr, uint8_t data){
set_addr(addr);
DATA_DDR_REG = 0xFF;
DATA_REG = data;
CTRL_REG &= ~(1<<WR_SHIFT) & ~(1<<CS_UART_SHIFT);
_delay_us(BUS_HOLD_US); /*Wait for the data and signal lanes to become stable*/
CTRL_REG |= 1<<CS_UART_SHIFT | 1<<WR_SHIFT;
return;
}
uint8_t read_from_uart(uint8_t addr){
uint8_t data = 0x00;
set_addr(addr);
DATA_DDR_REG = 0x00;
/* Sometimes the avr "forgets" to alter the port register for one cycle
* which usually isn't a problem but has lead to instability. Worthy
* one clock cycle */
DATA_REG = 0x00;
CTRL_REG &= ~(1<<RD_SHIFT) & ~(1<<CS_UART_SHIFT);
_delay_us(BUS_HOLD_US); /* Wait for the data and signal lanes to become
* stable*/
data = PINF;
CTRL_REG |= 1<<CS_UART_SHIFT | 1<<RD_SHIFT;
return data;
}
void init_uart(){
write_to_uart(UART_REG_LCR,0x83);
write_to_uart(UART_REG_DLLS,0x03);
write_to_uart(UART_REG_DLMS,0x00);
write_to_uart(UART_REG_LCR,0x03);
stdout = &stdout_16550;
printf("INIT\r\n");
return;
}
int putchar_16550(char var, FILE *stream __attribute__((unused))){
for(uint32_t i = 0; i < 1000000; i++ ){
uint8_t received = read_from_uart(UART_REG_LSR);
if((received & (1<<5))){
break;
}
}
write_to_uart(UART_REG_TXRX,var);
return 0;
}