176 lines
3.8 KiB
C
176 lines
3.8 KiB
C
/* Copyright © 2020 tyrolyean
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#define F_CPU 16000000UL
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#include <stdio.h>
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#include <string.h>
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#include <stdlib.h>
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#include <avr/wdt.h>
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#include <util/delay.h>
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#include <avr/interrupt.h>
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#define BUS_HOLD_US 1
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/* Shift values inside the PORTK Register */
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#define WR_SHIFT 1
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#define RD_SHIFT 2
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#define MR_SHIFT 0
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#define CS_SHIFT 3
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#define CS_ADC_SHIFT 4
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/* Registers in the 16550 UART */
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#define UART_REG_DLLS 0
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#define UART_REG_DLMS 1
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#define UART_REG_TXRX 0
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#define UART_REG_IER 1
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#define UART_REG_IIR 2
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#define UART_REG_LCR 3
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#define UART_REG_MCR 4
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#define UART_REG_LSR 5
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#define UART_REG_MSR 6
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#define UART_REG_SCR 7
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uint8_t mcusr_mirror __attribute__ ((section (".noinit")));
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void get_mcusr(void) \
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__attribute__((naked)) \
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__attribute__((section(".init3")));
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void get_mcusr(void)
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{
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mcusr_mirror = MCUSR;
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MCUSR = 0;
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wdt_disable();
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}
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int routine();
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void set_addr(uint8_t addr){
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PORTK = addr;
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return;
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}
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void write_to_16550(uint8_t addr, uint8_t data){
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set_addr(addr);
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DDRF = 0xFF;
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PORTL &= ~(1<<WR_SHIFT);
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PORTF = data;
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PORTL &= ~(1<<CS_SHIFT);
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_delay_us(BUS_HOLD_US); /*Wait for the data and signal lanes to become stable*/
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PORTL |= 1<<CS_SHIFT;
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set_addr(0x00);
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PORTL |= 1<<WR_SHIFT;
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PORTF = 0x00;
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return;
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}
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uint8_t read_from_16550(uint8_t addr){
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uint8_t data = 0x00;
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set_addr(addr);
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DDRF = 0x00;
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PORTF = 0x00;
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PORTL &= ~(1<<RD_SHIFT);
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PORTL &= ~(1<<CS_SHIFT);
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_delay_us(BUS_HOLD_US); /* Wait for the data and signal lanes to become stable*/
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data = PINF;
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PORTL |= 1<<CS_SHIFT;
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set_addr(0x00);
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PORTL |= 1<<RD_SHIFT;
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DDRF = 0xFF;
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PORTF = 0x00;
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_delay_us(BUS_HOLD_US); /*Wait for the data and signal lanes to become stable*/
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return data;
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}
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int main(){
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/* Disable interrupts during initialisation phase */
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cli();
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/* Setup Data Direction Registers and populate with sane default
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values */
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DDRF = 0xFF; /* Data Bus */
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DDRK = 0xFF; /* Address Bus */
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DDRL = 0xFF; /* Control Bus */
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PORTF = 0x00;
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PORTK = 0x00;
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PORTL = 0x00;
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/* Cleanly reset the 16550 uart */
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PORTL |= (1<<WR_SHIFT);
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PORTL |= (1<<RD_SHIFT);
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PORTL |= (1<<CS_SHIFT);
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PORTL |= (1<<CS_ADC_SHIFT);
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PORTL |= (1<<MR_SHIFT);
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_delay_us(100);
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PORTL &= ~(1<<MR_SHIFT);
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_delay_us(1000);
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write_to_16550(UART_REG_LCR,0x83);
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write_to_16550(UART_REG_DLLS,0x03);
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write_to_16550(UART_REG_DLMS,0x00);
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write_to_16550(UART_REG_LCR,0x03);
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write_to_16550(UART_REG_TXRX,'I');
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_delay_us(10000);
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write_to_16550(UART_REG_TXRX,'N');
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_delay_us(10000);
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write_to_16550(UART_REG_TXRX,'I');
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_delay_us(10000);
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write_to_16550(UART_REG_TXRX,'T');
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_delay_us(10000);
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write_to_16550(UART_REG_TXRX,'\r');
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_delay_us(10000);
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write_to_16550(UART_REG_TXRX,'\n');
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_delay_us(10000);
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sei();
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/* Enable the hardware watchdog. In case the microcontroller fails to
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* finish it's task within the specified time, the watchdog will reset
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* the atmel cookie.
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*/
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wdt_enable(WDTO_1S);
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for(;;){
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wdt_reset();
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routine();
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}
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return 0;
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}
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int routine(){
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uint8_t received = read_from_16550(UART_REG_LSR);
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if(received & 0x01){
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received = read_from_16550(UART_REG_TXRX);
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write_to_16550(UART_REG_TXRX,received);
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}
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return 0;
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}
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