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Improve FPGA comparison tables

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Xiretza 2020-03-29 18:04:34 +02:00
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preamble.tex
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@ -338,3 +338,5 @@ minimum height=1cm, align=center, text width=3cm, draw=black, fill=blue!30]
bottom=0pt bottom=0pt
} }
\newcommand{\icode}[1]{\codeBox{\texttt{#1}}} \newcommand{\icode}[1]{\codeBox{\texttt{#1}}}
\usepackage{booktabs}

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sections/soc/soc.tex
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@ -15,28 +15,42 @@ As a starting point, a Terasic DE0 development board\footnote{\url{https://www.t
The only method of synthesis for Altera devices is to use the proprietary Quartus IDE. However, the last version of Quartus to support the Cyclone III series of FPGAs (version 13.1) had already been out of date for several years at the start of the project. Because of this and the increasing resource demand of the developing core, an Arty A7-35T development board\footnote{\url{https://store.digilentinc.com/arty-a7-artix-7-fpga-development-board-for-makers-and-hobbyists/}} with a Xilinx Artix-7\footnote{\url{https://www.xilinx.com/products/silicon-devices/fpga/artix-7.html}} FPGA was ordered from Digilent. The only method of synthesis for Altera devices is to use the proprietary Quartus IDE. However, the last version of Quartus to support the Cyclone III series of FPGAs (version 13.1) had already been out of date for several years at the start of the project. Because of this and the increasing resource demand of the developing core, an Arty A7-35T development board\footnote{\url{https://store.digilentinc.com/arty-a7-artix-7-fpga-development-board-for-makers-and-hobbyists/}} with a Xilinx Artix-7\footnote{\url{https://www.xilinx.com/products/silicon-devices/fpga/artix-7.html}} FPGA was ordered from Digilent.
The two FPGAs compare as follows: A comparison between the two FPGAs themselves can be seen in \autoref{tab:fpga-comparison}, a comparison between the peripherals on the development boards in \autoref{tab:devboard-comparison}.
\begin{tabular}{l r r} \begin{table}[h]
\centering
\begin{tabular}{l|r|r}
\toprule
& Altera EP3C16 & Xilinx XC7A35T \\ & Altera EP3C16 & Xilinx XC7A35T \\
\midrule
Logic Elements & 15000 & 33280 \\ Logic Elements & 15000 & 33280 \\
Multipliers & 56 & 90 \\ Multipliers & 56 & 90 \\
Block RAM (kb) & 504 & 1800 \\ Block RAM (kb) & 504 & 1800 \\
PLLs & 4 & 5 \\ PLLs & 4 & 5 \\
Global clocks & 20 & 32 \\ Global clocks & 20 & 32 \\
\bottomrule
\end{tabular} \end{tabular}
\caption{Comparison between Altera and Xilinx FPGAs}
\label{tab:fpga-comparison}
\end{table}
The periphery on the development boards: \begin{table}[h]
\centering
\begin{tabular}{l|r|r} \begin{tabular}{l|r|r}
\toprule
& Terasic DE0 & Digilent Arty A7-35T \\ & Terasic DE0 & Digilent Arty A7-35T \\
\midrule
Switches & 10 & 4 \\ Switches & 10 & 4 \\
Buttons & 3 & 4 \\ Buttons & 3 & 4 \\
LEDs & 10 + 4x 7-segment & 4 + 3 RGB \\ LEDs & 10 + 4x 7-segment & 4 + 3 RGB \\
GPIOs & 2x 36 & 4x PMOD + chipKIT \\ GPIOs & 2x 36 & 4x PMOD + chipKIT \\
Memory & 8MB SDRAM & 256MB DDR3L \\ Memory & 8MB SDRAM & 256MB DDR3L \\
Others & SD card, VGA & Ethernet \\ Others & SD card, VGA & Ethernet \\
\bottomrule
\end{tabular} \end{tabular}
\caption{Comparison between the peripherals on Terasic and Digilent FPGA development boards}
\label{tab:devboard-comparison}
\end{table}
While the Digilent board offers fewer IO options, the DDR3 memory can be interfaced using Free memory cores and allows for much larger programs to be loaded, possibly even a full operating system. The missing VGA port has been substituted by a HDMI-compatible DVI interface that is accessible through one of the high-speed PMOD connectors. While the Digilent board offers fewer IO options, the DDR3 memory can be interfaced using Free memory cores and allows for much larger programs to be loaded, possibly even a full operating system. The missing VGA port has been substituted by a HDMI-compatible DVI interface that is accessible through one of the high-speed PMOD connectors.