diff --git a/main.pdf b/main.pdf index 8d24f8c..3b8db6d 100644 --- a/main.pdf +++ b/main.pdf @@ -1,3 +1,3 @@ version https://git-lfs.github.com/spec/v1 -oid sha256:853e2e3f11b687a069c311319f402ea65a8b866291bd48baf93b9137e20616be -size 3375065 +oid sha256:d4cb03ccf025a3facf3bf3a09781a51960390333d6e2a4f1f49b55c535aff95f +size 3394990 diff --git a/main.tex b/main.tex index db1b017..65f1ca4 100644 --- a/main.tex +++ b/main.tex @@ -126,7 +126,7 @@ geschlechtsunabh"angig verstanden werden soll. \clearpage \pagestyle{fancy} -\section{Hardware peripherials} +\section{Hardware peripherals} \DP\input{sections/DP/PARALLELBUS/main.tex} \DP\input{sections/DP/MEAS_TEST/main.tex} \DP\input{sections/DP/CASE_BACKPLANE/main.tex} diff --git a/planung/DP/aufgabenstellung.tex b/planung/DP/aufgabenstellung.tex index 304a4eb..6e45a87 100644 --- a/planung/DP/aufgabenstellung.tex +++ b/planung/DP/aufgabenstellung.tex @@ -12,7 +12,7 @@ peripherials schematics and a working implementation in the hardware building style of the hackerspace should be built. All nescessary hardware will be provided by the Hackerspace. If possible already present hardware should be used, if impossible new one will be ordered. All schematics should, where -possible be written in open-source software such as Kicad or GNU-EDA. +possible, be constructed in Free software such as Kicad or GNU-EDA. If possible software-examples should be written as well, though the complexity of these are coupled to the time left to spend on the project. Software should diff --git a/sections/Anhang/Projektterminplanung/projektterminplanungDP.tex b/sections/Anhang/Projektterminplanung/projektterminplanungDP.tex index 9a59a4f..ff8342b 100644 --- a/sections/Anhang/Projektterminplanung/projektterminplanungDP.tex +++ b/sections/Anhang/Projektterminplanung/projektterminplanungDP.tex @@ -52,3 +52,134 @@ die Meilensteintermine wurden vom Betreuer festgelegt. \label{tab:mst_plank} \end{table} +\subsubsection{Work time reference} + +Table \ref{tab:plank_work} shows the times worked. + +\begin{longtable}{| l | c | p{100mm} |} + \hline + \textbf{Date} & \textbf{Duration [h]} & \textbf{Task}\\ + \hline + \hline + 2019-09-06 & 4.25 & start of thesis document \\ + \hline + 2019-09-07 & 2.25 & planning of thesis \\ + \hline + 2019-09-20 & 1 & planning part two, input into database \\ + \hline + 2019-09-23 & 0.5 & corrections in database \\ + \hline + 2019-09-25 & 0.5 & discussions with supervisor about deadlines\\ + \hline + 2019-09-27 & 0.25 & reformatting and discussion about database entry\\ + \hline + 2019-10-11 & 2 & tests and high level design for MS1\\ + \hline + 2019-10-12 & 3.75 & gather PDFs for MS1\\ + \hline + 2019-10-16 & 2.5 & tests and high level design for MS1\\ + \hline + 2019-10-17 & 2.5 & tests and high level design for MS1\\ + \hline + 2019-10-20 & 4.25 & tests and high level design for MS1\\ + \hline + 2019-10-22 & 3.5 & Finalisation tests and high level design for MS1\\ + \hline + 2019-12-08 & 4.75 & Download thesis template and implement\\ + \hline + 2020-01-03 & 6.75 & Planning and early schematics of serial module\\ + \hline + 2020-01-04 & 2 & Parallel port layout\\ + \hline + 2020-01-08 & 3.75 & Serial console breadboard test\\ + \hline + 2020-01-11 & 2.5 & Attempting interaction with 16550\\ + \hline + 2020-01-18 & 4.5 & Attempting interaction with 16550 nailing down errors\\ + \hline + 2020-01-18 & 3 & Attempting interaction with 16550\\ + \hline + 2020-02-25 & 1 & Help partner with hosting tar.gz file\\ + \hline + 2020-01-26 & 6.25 & Attempting interaction with 16550 no output\\ + \hline + 2020-02-01 & 3 & Attempting interaction with 16550 quartz doesn’t oscillate\\ + \hline + 2020-02-07 & 5.5 & Attempting to make 1.8432MHz oscillators oscillate\\ + \hline + 2020-02-08 & 3 & Oscillation succeeded… finaly\\ + \hline + 2020-02-09 & 7.75 & Transmit character in serial via 16550\\ + \hline + 2020-02-10 & 4 & Serial console eurocard\\ + \hline + 2020-02-11 & 5 & Serial console and arduino eurocard\\ + \hline + 2020-02-12 & 5 & Serial console and arduino eurocard\\ + \hline + 2020-02-13 & 4 & Serial console and arduino eurocard testing\\ + \hline + 2020-02-14 & 6 & Serial console and arduino eurocard code\\ + \hline + 2020-02-15 & 3.5 & Serial console and arduino eurocard code\\ + \hline + 2020-02-18 & 3.5 & ECHO! Program\\ + \hline + 2020-02-19 & 3.5 & DAC schematic and breadboard beginning\\ + \hline + 2020-02-20 & 2.25 & DAC driver simulation attempt\\ + \hline + 2020-03-01 & 3.25 & Level shifter test and verification\\ + \hline + 2020-03-04 & 2 & DAC fifo breadboard\\ + \hline + 2020-03-08 & 7.5 & breadboard final test DAC and FIFO and eurocard\\ + \hline + 2020-03-10 & 4.75 & DAC module test and sine generation code\\ + \hline + 2020-03-11 & 4.25 & textadventure start\\ + \hline + 2020-03-12 & 4.25 & textadventure polling dac and 16550\\ + \hline + 2020-03-13 & 4.5 & finalisation of everything in school COVID-19\\ + \hline + 2020-03-14 & 5 & textadventure DAC mode implementation\\ + \hline + 2020-03-15 & 4 & textadventure sound routines\\ + \hline + 2020-03-17 & 4 & textadventure gameplay\\ + \hline + 2020-03-18 & 6 & documentation\\ + \hline + 2020-03-19 & 4 & documentation\\ + \hline + 2020-03-20 & 3 & documentation\\ + \hline + 2020-03-21 & 1 & textadventure gamplay\\ + \hline + 2020-03-22 & 0.5 & textadventure gamplay\\ + \hline + 2020-03-23 & 6.25 & documentation\\ + \hline + 2020-03-24 & 6.75 & documentation\\ + \hline + 2020-03-25 & 7.25 & documentation\\ + \hline + 2020-03-26 & 7 & documentation\\ + \hline + 2020-03-27 & 5.75 & documentation\\ + \hline + 2020-03-28 & 4.5 & documentation\\ + \hline + 2020-03-29 & 6.5 & documentation\\ + \hline + 2020-03-30 & 9.75 & documentation\\ + \hline + 2020-03-31 & 0 & documentation\\ + \hline + \hline + 2020-04-01 & \textbf{SUM} & 229.5h\\ + \hline +\caption{Work time reference} +\label{tab:plank_work} +\end{longtable} diff --git a/sections/Anhang/schlussfolgerung.tex b/sections/Anhang/schlussfolgerung.tex index 080b1d4..b92559d 100644 --- a/sections/Anhang/schlussfolgerung.tex +++ b/sections/Anhang/schlussfolgerung.tex @@ -1,6 +1,6 @@ Aus der Projektimplementierung konnten viele Lehren gezogen werden. Messungen -welche mittels ses Analog Discoverys durchgeführt wurden sind bis zu ungefähr -1MHz frequenz gut zu gebrauchen werden danach jedoch sehr stark fehlerhaft. Alle +welche mittels des Analog Discovery durchgeführt wurden sind bis zu ungefähr +1MHz Frequenz gut zu gebrauchen werden danach jedoch sehr stark fehlerhaft. Alle Bauteile in THT Bauform zu verwenden vereinfachte Messungen am Steckbrett erheblich, jedoch werden diese bei hohen Frequenzen unzuverlässig. Viele Implementationsdetails wurden durch mündlich übergebene Hinweise verbessert diff --git a/sections/DP/CASE_BACKPLANE/main.tex b/sections/DP/CASE_BACKPLANE/main.tex index 125cc42..c0a5eda 100644 --- a/sections/DP/CASE_BACKPLANE/main.tex +++ b/sections/DP/CASE_BACKPLANE/main.tex @@ -1,8 +1,8 @@ \subsection{Backplane} To connect the modules to the microprocessor, many pins need to be connected -straight through. For this purpose a backplane was chosen where DIN41612 -connectors can be used. These connectors were chosen for their large pin count +straight through. For this purpose a backplane with DIN41612 +connectors is beeingused . These connectors are used for their large pin count (96 pins) and their availability. The backplane connects all 96-pins straight through. With the 6 outer left and right pins connected for VCC and ground as can be seen in Figure \ref{fig:schem_back_conn}. diff --git a/sections/DP/MEAS_TEST/main.tex b/sections/DP/MEAS_TEST/main.tex index 5ee3f76..96a9916 100644 --- a/sections/DP/MEAS_TEST/main.tex +++ b/sections/DP/MEAS_TEST/main.tex @@ -1,7 +1,7 @@ \subsection{Testing and Measurement} For functional testing and verification of implementation goals measurements -needed to be performed in various different ways and testing software was +needed to be performed in various different ways, and testing software was required. \subsubsection{Measurements} @@ -25,7 +25,7 @@ occurance. All testing was performed with an Atmel ATMega2560 due to it's large amount of I/O pins, 5V I/O, which is the more common voltage level on CMOS -peripherials, way of addressing pins (8 at a time) and availability. +peripherals, way of addressing pins (8 at a time) and availability. \cite{atmega2560} All testing software was written for this ATMega and compiled using the avr-gcc from the GNU-Project. @@ -38,7 +38,7 @@ for all indends and purposes, only a breakout of the ATMega 2560 and has only been used in that way. No parts of the Arduino\texttrademark IDE or other parts of the Arduino\texttrademark software suite have been used, as they consume too much memory and the abstraction models used are not compatiable with building -processor peripherials. +processor peripherals. \begin{figure}[H] \centering diff --git a/sections/DP/PARALLELBUS/main.tex b/sections/DP/PARALLELBUS/main.tex index d9ed87f..0239d11 100644 --- a/sections/DP/PARALLELBUS/main.tex +++ b/sections/DP/PARALLELBUS/main.tex @@ -1,7 +1,7 @@ \subsection{Parallel bus} The core part of the hardware is the interface between the microprocessor and -the hardware peripherials. This bus is delivering data in parallel and is +the hardware peripherals. This bus is delivering data in parallel and is therefore named the ``parallel bus``. This bus has 3 different sub-parts: \begin{enumerate} @@ -55,8 +55,8 @@ therefore easy to program with. The address bus is unidirectional. \subsubsection{Data Bus} The data bus contains the actual data to be stored to and read from registers. -The data bus is, as well on most systems a multiple of 16 bits wide, but for the -same reasons as the data bus, was shrunk down in our case to 8 bits. The data +The data bus is as well on most systems a multiple of 16 bits wide, but for the +same reasons as the data bus is shrunk down in our case to 8 bits. The data bus is bidirectional. \subsubsection{Control Bus} @@ -90,25 +90,25 @@ in our case is 5 bits wide and consists of: \paragraph{Master Reset} -A high level on the $MR$ lane signals to the peripherials that a reset of all +A high level on the $MR$ lane signals to the peripherals, that a reset of all registers and states should occure. This is needed for the serial console and the DAC. \paragraph{Write Not} -A low level on the $\lnot WR$ lane signals the corresponding modules that the +A low level on the $\lnot WR$ lane signals the corresponding modules, that the data on the data bus should be written to the register on the address specified from the address bus. \paragraph{Read Not} -A low level on the $\lnot RD$ lane signals the corresponding modules that the +A low level on the $\lnot RD$ lane signals the corresponding modules, that the data from the register specified by the address on the address bus should be written to the data bus. \paragraph{Module Select 1 and 2 Not} -A low level on one of these lines signals the corresponding module that the +A low level on one of these lines signals the corresponding module, that the data on address data and the control lines is meant for it. \paragraph{Sepearation of $\lnot RD$/$\lnot WR$ and$\lnot MS1$/$\lnot MS2$} @@ -121,7 +121,7 @@ point in time. Therefore these signals have not been combined. \subsection{Von Neumann Archtiecture} -The term ``von Neumann architecture`` referrs to a type of computer architecture +The term ``von Neumann architecture`` refers to a type of computer architecture which referres to almost any modern computer system. It describes the in this thesis used Human input and output parts and the general workings of modern processors with the ALU\footnote{ALU...arithmetic logic unit} or the CA @@ -143,7 +143,7 @@ This can be applied to the hardware implemented in this thesis, as well as other general computing systems. The EDVAC, which his thesis referres to, was a computer developed for military purposes. Much like the EDVAC, the CPU in this thesis is responsible for arithemtic operations and code interpetation. The -peripherials are what is referred to as the input and output devices in his +peripherals are what is referred to as the input and output devices in his report. Though the for examples used ATMega2650 utilizes a harvard architecture ``In order to maximize performance and parallellism``\cite[p.11]{atmega2560} the more general descriptions of computational operations still apply to this diff --git a/sections/DP/UART/main.tex b/sections/DP/UART/main.tex index 7de8716..4289731 100644 --- a/sections/DP/UART/main.tex +++ b/sections/DP/UART/main.tex @@ -5,10 +5,11 @@ systems, and even today on server machines, this is done via a serial console. On this serial console characters are transmitted in serial, which means bit by bit over the same line. The voltage levels used in these systems vary from 5V to 3.3V or +-10V. The most common standard for these voltage levels is the -former RS-232\footnote{RS... Recommended Standard} or as it should be called +former RS-232\footnote{RS... Recommended Standard}, or as it should be called now, TIA-\footnote{TIA...Telecommunications Industry Association}/EIA-\footnote{EIA.. Electronic Industries Alliance}232.\cite{rs232} -Voltage-levels ,as per TIA-/EIA- standard, are not practical to handle over short +Voltage-levels, as per TIA-/EIA-232 standard, are not practical to handle over +short distances however, so other voltages are used on most interface chips and need to be converted. diff --git a/sections/DP/dac/main.tex b/sections/DP/dac/main.tex index f412b4f..b0e564b 100644 --- a/sections/DP/dac/main.tex +++ b/sections/DP/dac/main.tex @@ -342,7 +342,7 @@ on the AVR. \cite{atmega2560} \end{figure} -\section{Addressing DACA and DACB} +\subsubsection{Addressing DACA and DACB} The DAC used has 2 output channels which can be selected by the $\lnot DACA/DACB$ pin as seen in figure \ref{fig:tlc7528_pinout}. This pin was diff --git a/sections/DP/plan.tex b/sections/DP/plan.tex index b4beece..14961ff 100644 --- a/sections/DP/plan.tex +++ b/sections/DP/plan.tex @@ -1,12 +1,12 @@ -\subsection{Hardware peripherials} +\subsection{Hardware peripherals} -Planning of the peripherials was done based on the information provided on large +Planning of the peripherals was done based on the information provided on large parts by David Oberhollenzer. A lot of his advice contributed heavily to the direction the development went. \subsubsection{Peripherial selection} -The selection of the hardware peripherials was done based on implementation +The selection of the hardware peripherals was done based on implementation difficulty, common use in computer systems, relevance in current times and wether they were fitting for demonstrative purposes. @@ -79,13 +79,13 @@ understanding of IIC as it is only known in technical fields. \paragraph{Utility analysis} -Among the above mentioned processor peripherials from the criteria mentioned +Among the above mentioned processor peripherals from the criteria mentioned before a utility analysis was performed. To do this different point have been credited for the criteria mentioned which can be seen in Table \ref{tab:utility_base}. The multipliers in Table \ref{tab:utility_base} have been applied to the points and the sums in Table \ref{tab:utility_result} resulted. Based on this -result the DAC and Serial Communication interface were chosen as peripherials. +result the DAC and Serial Communication interface were chosen as peripherals. \begin{table}[H] \centering @@ -106,7 +106,7 @@ result the DAC and Serial Communication interface were chosen as peripherials. \end{tabular} } - \caption{utility analysis base points for peripherials} + \caption{utility analysis base points for peripherals} \label{tab:utility_base} \end{table} @@ -128,7 +128,7 @@ result the DAC and Serial Communication interface were chosen as peripherials. \end{tabular} - \caption{utility analysis multipliers for peripherials} + \caption{utility analysis multipliers for peripherals} \label{tab:utility_mul} \end{table} @@ -157,6 +157,6 @@ result the DAC and Serial Communication interface were chosen as peripherials. \end{tabular} } - \caption{utility analysis results for peripherials} + \caption{utility analysis results for peripherals} \label{tab:utility_result} \end{table} diff --git a/sections/abstract.tex b/sections/abstract.tex index 7804938..61425ba 100644 --- a/sections/abstract.tex +++ b/sections/abstract.tex @@ -13,15 +13,15 @@ RISC-V32I base instruction set. Aufgrund der starken Verwendung von Englisch im Software- und Hardwarebereich wurde diese Diplomarbeit in Englisch verfasst, wodurch ebenfalls die Lesbarkeit erhöht wird. Die entstandene Dokumentation soll für -Menschen mit einem grundlegenden Verständnis von Elektronik sowie der Hardware- +Menschen mit einem grundlegenden Verständnis für Elektronik sowie der Hardware- Beschreibungssprache VHDL verständlich sein. \end{otherlanguage} \\\\ This diploma thesis deals with the operation of processors and their -corresponding peripherials in modern and traditional forms. It attempts to +corresponding peripherals in modern and traditional forms. It attempts to illustrate the structure of a computersystem in hard- and software. To reach this goal a RISC-V32I processor has been implemented in VHDL on a XILINX FPGA -as well as some peripherials bound to the parallel bus. These peripherials +as well as some peripherals bound to the parallel bus. These peripherals include a 2-channel 8-bit Digital to analog converter as well as a TIA-/EIA-232 compliant serial interface. Due to the common use of english in the hardware and software engineering field this thesis is written in english, which diff --git a/sections/intro.tex b/sections/intro.tex index cf2831b..258e44a 100644 --- a/sections/intro.tex +++ b/sections/intro.tex @@ -4,15 +4,15 @@ from scratch has come up. Multiple suggestions on how to implement it and the scope of the project were gathered. Originally the goal of the project was to have a computer which would consist of seperate plug-in cards on each of which one instruction would reside. This would debunk the mystery behind the ``black -box`` which processors today are. +box`` which processors are today. Most processors today are only documented on the execution of their programs and not on their internals. The projects aim was later redirected, due to concerns about the difficulty of the project, to build a processor in VHDL instead. After several months of implementation time the project was split into two parts: the -peripherials and the core processor. During the development processes and after +peripherals and the core processor. During the development processes and after rememberingthe original goal to make a processor understandable, the -peripherials changed from being implemented in VHDL back to hardware, which came +peripherals changed from being implemented in VHDL back to hardware, which came with increased work but would result in a far more understandable final product. The decision for a RISC-V based processor was made at the beginning of the diff --git a/sections/result.tex b/sections/result.tex index d8a109c..3f6dc86 100644 --- a/sections/result.tex +++ b/sections/result.tex @@ -1,18 +1,17 @@ The project is fully implemented with all functionality originally targeted. The system has been tested and verified. All example codes have been documented and tested. Hardware implementations were created using -open-source programs, while the RISC-V processor can be compiled with an open -source -toolchain. The completed project can be found on the USB stick which accompanies +Free software programs, while the RISC-V processor can be compiled with a Free +toolchain. The completed project can be found on the USB stick, which accompanies this thesis, or in the git repositories at \url{https://git.it-syndikat.org/tyrolyean/dipl.git} and -\url{https://gitlab.com/YARM-project/}. The completed hardware peripherials can +\url{https://gitlab.com/YARM-project/}. The completed hardware peripherals can be seen in Figure \ref{fig:all_mod} \begin{figure}[H] \centering \includegraphics[width=\textwidth, angle=180]{pics/all_mod} - \caption{An overview of the hardware peripherials} + \caption{An overview of the hardware peripherals} \label{fig:all_mod} \end{figure} diff --git a/svg-inkscape/idt7201_pinout_svg-tex.pdf b/svg-inkscape/idt7201_pinout_svg-tex.pdf deleted file mode 100644 index dadb300..0000000 Binary files a/svg-inkscape/idt7201_pinout_svg-tex.pdf and /dev/null differ diff --git a/svg-inkscape/idt7201_pinout_svg-tex.pdf_tex b/svg-inkscape/idt7201_pinout_svg-tex.pdf_tex deleted file mode 100644 index 414f4f9..0000000 --- a/svg-inkscape/idt7201_pinout_svg-tex.pdf_tex +++ /dev/null @@ -1,58 +0,0 @@ -%% Creator: Inkscape inkscape 0.92.4, www.inkscape.org -%% PDF/EPS/PS + LaTeX output extension by Johan Engelen, 2010 -%% Accompanies image file 'idt7201_pinout_svg-tex.pdf' (pdf, eps, ps) -%% -%% To include the image in your LaTeX document, write -%% \input{.pdf_tex} -%% instead of -%% \includegraphics{.pdf} -%% To scale the image, write -%% \def\svgwidth{} -%% \input{.pdf_tex} -%% instead of -%% \includegraphics[width=]{.pdf} -%% -%% Images with a different path to the parent latex file can -%% be accessed with the `import' package (which may need to be -%% installed) using -%% \usepackage{import} -%% in the preamble, and then including the image with -%% \import{}{.pdf_tex} -%% Alternatively, one can specify -%% \graphicspath{{/}} -%% -%% For more information, please see info/svg-inkscape on CTAN: -%% http://tug.ctan.org/tex-archive/info/svg-inkscape -%% -\begingroup% - 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\end{picture}% -\endgroup% diff --git a/svg-inkscape/pc16550d_pinout_svg-tex.pdf b/svg-inkscape/pc16550d_pinout_svg-tex.pdf deleted file mode 100644 index 20ac416..0000000 Binary files a/svg-inkscape/pc16550d_pinout_svg-tex.pdf and /dev/null differ diff --git a/svg-inkscape/pc16550d_pinout_svg-tex.pdf_tex b/svg-inkscape/pc16550d_pinout_svg-tex.pdf_tex deleted file mode 100644 index c8af957..0000000 --- a/svg-inkscape/pc16550d_pinout_svg-tex.pdf_tex +++ /dev/null @@ -1,58 +0,0 @@ -%% Creator: Inkscape inkscape 0.92.4, www.inkscape.org -%% PDF/EPS/PS + LaTeX output extension by Johan Engelen, 2010 -%% Accompanies image file 'pc16550d_pinout_svg-tex.pdf' (pdf, eps, ps) -%% -%% To include the image in your LaTeX document, write -%% \input{.pdf_tex} -%% instead of -%% \includegraphics{.pdf} -%% To scale the image, write -%% \def\svgwidth{} -%% \input{.pdf_tex} -%% instead of -%% \includegraphics[width=]{.pdf} -%% -%% Images with a different path to the parent latex file can -%% be accessed with the `import' package (which may need to be -%% installed) using -%% \usepackage{import} -%% in the preamble, and then including the image with -%% \import{}{.pdf_tex} -%% Alternatively, one can specify -%% \graphicspath{{/}} -%% -%% For more information, please see info/svg-inkscape on CTAN: -%% http://tug.ctan.org/tex-archive/info/svg-inkscape -%% -\begingroup% - \makeatletter% - \providecommand\color[2][]{% - \errmessage{(Inkscape) Color is used for the text in Inkscape, but the package 'color.sty' is not loaded}% - \renewcommand\color[2][]{}% - }% - \providecommand\transparent[1]{% - \errmessage{(Inkscape) Transparency is used (non-zero) for the text in Inkscape, but the package 'transparent.sty' is not loaded}% - \renewcommand\transparent[1]{}% - }% - \providecommand\rotatebox[2]{#2}% - \newcommand*\fsize{\dimexpr\f@size pt\relax}% - \newcommand*\lineheight[1]{\fontsize{\fsize}{#1\fsize}\selectfont}% - \ifx\svgwidth\undefined% - \setlength{\unitlength}{114.46999714bp}% - \ifx\svgscale\undefined% - \relax% - \else% - \setlength{\unitlength}{\unitlength * \real{\svgscale}}% - \fi% - \else% - \setlength{\unitlength}{\svgwidth}% - \fi% - \global\let\svgwidth\undefined% - \global\let\svgscale\undefined% - \makeatother% - \begin{picture}(1,2.29603007)% - \lineheight{1}% - \setlength\tabcolsep{0pt}% - \put(0,0){\includegraphics[width=\unitlength,page=1]{pc16550d_pinout_svg-tex.pdf}}% - \end{picture}% -\endgroup% diff --git a/svg-inkscape/slas062e_pinout_svg-tex.pdf b/svg-inkscape/slas062e_pinout_svg-tex.pdf deleted file mode 100644 index 57759fb..0000000 Binary files a/svg-inkscape/slas062e_pinout_svg-tex.pdf and /dev/null differ diff --git a/svg-inkscape/slas062e_pinout_svg-tex.pdf_tex b/svg-inkscape/slas062e_pinout_svg-tex.pdf_tex deleted file mode 100644 index 5068faf..0000000 --- a/svg-inkscape/slas062e_pinout_svg-tex.pdf_tex +++ /dev/null @@ -1,58 +0,0 @@ -%% Creator: Inkscape inkscape 0.92.4, www.inkscape.org -%% PDF/EPS/PS + LaTeX output extension by Johan Engelen, 2010 -%% Accompanies image file 'slas062e_pinout_svg-tex.pdf' (pdf, eps, ps) -%% -%% To include the image in your LaTeX document, write -%% \input{.pdf_tex} -%% instead of -%% \includegraphics{.pdf} -%% To scale the image, write -%% \def\svgwidth{} -%% \input{.pdf_tex} -%% instead of -%% \includegraphics[width=]{.pdf} -%% -%% Images with a different path to the parent latex file can -%% be accessed with the `import' package (which may need to be -%% installed) using -%% \usepackage{import} -%% in the preamble, and then including the image with -%% \import{}{.pdf_tex} -%% Alternatively, one can specify -%% \graphicspath{{/}} -%% -%% For more information, please see info/svg-inkscape on CTAN: -%% http://tug.ctan.org/tex-archive/info/svg-inkscape -%% -\begingroup% - \makeatletter% - \providecommand\color[2][]{% - \errmessage{(Inkscape) Color is used for the text in Inkscape, but the package 'color.sty' is not loaded}% - \renewcommand\color[2][]{}% - }% - \providecommand\transparent[1]{% - \errmessage{(Inkscape) Transparency is used (non-zero) for the text in Inkscape, but the package 'transparent.sty' is not loaded}% - \renewcommand\transparent[1]{}% - }% - \providecommand\rotatebox[2]{#2}% - \newcommand*\fsize{\dimexpr\f@size pt\relax}% - \newcommand*\lineheight[1]{\fontsize{\fsize}{#1\fsize}\selectfont}% - \ifx\svgwidth\undefined% - \setlength{\unitlength}{152.20749819bp}% - \ifx\svgscale\undefined% - \relax% - \else% - \setlength{\unitlength}{\unitlength * \real{\svgscale}}% - \fi% - \else% - \setlength{\unitlength}{\svgwidth}% - \fi% - \global\let\svgwidth\undefined% - \global\let\svgscale\undefined% - \makeatother% - \begin{picture}(1,1.02692507)% - \lineheight{1}% - \setlength\tabcolsep{0pt}% - \put(0,0){\includegraphics[width=\unitlength,page=1]{slas062e_pinout_svg-tex.pdf}}% - \end{picture}% -\endgroup% diff --git a/svg-inkscape/slas062e_volt_svg-tex.pdf b/svg-inkscape/slas062e_volt_svg-tex.pdf deleted file mode 100644 index 6fba039..0000000 Binary files a/svg-inkscape/slas062e_volt_svg-tex.pdf and /dev/null differ diff --git a/svg-inkscape/slas062e_volt_svg-tex.pdf_tex b/svg-inkscape/slas062e_volt_svg-tex.pdf_tex deleted file mode 100644 index 27298f9..0000000 --- a/svg-inkscape/slas062e_volt_svg-tex.pdf_tex +++ /dev/null @@ -1,58 +0,0 @@ -%% Creator: Inkscape inkscape 0.92.4, www.inkscape.org -%% PDF/EPS/PS + LaTeX output extension by Johan Engelen, 2010 -%% Accompanies image file 'slas062e_volt_svg-tex.pdf' (pdf, eps, ps) -%% -%% To include the image in your LaTeX document, write -%% \input{.pdf_tex} -%% instead of -%% \includegraphics{.pdf} -%% To scale the image, write -%% \def\svgwidth{} -%% \input{.pdf_tex} -%% instead of -%% \includegraphics[width=]{.pdf} -%% -%% Images with a different path to the parent latex file can -%% be accessed with the `import' package (which may need to be -%% installed) using -%% \usepackage{import} -%% in the preamble, and then including the image with -%% \import{}{.pdf_tex} -%% Alternatively, one can specify -%% \graphicspath{{/}} -%% -%% For more information, please see info/svg-inkscape on CTAN: -%% http://tug.ctan.org/tex-archive/info/svg-inkscape -%% -\begingroup% - \makeatletter% - \providecommand\color[2][]{% - \errmessage{(Inkscape) Color is used for the text in Inkscape, but the package 'color.sty' is not loaded}% - \renewcommand\color[2][]{}% - }% - \providecommand\transparent[1]{% - \errmessage{(Inkscape) Transparency is used (non-zero) for the text in Inkscape, but the package 'transparent.sty' is not loaded}% - \renewcommand\transparent[1]{}% - }% - \providecommand\rotatebox[2]{#2}% - \newcommand*\fsize{\dimexpr\f@size pt\relax}% - \newcommand*\lineheight[1]{\fontsize{\fsize}{#1\fsize}\selectfont}% - \ifx\svgwidth\undefined% - \setlength{\unitlength}{501.17228747bp}% - \ifx\svgscale\undefined% - \relax% - \else% - \setlength{\unitlength}{\unitlength * \real{\svgscale}}% - \fi% - \else% - \setlength{\unitlength}{\svgwidth}% - \fi% - \global\let\svgwidth\undefined% - \global\let\svgscale\undefined% - \makeatother% - \begin{picture}(1,0.57613499)% - \lineheight{1}% - \setlength\tabcolsep{0pt}% - \put(0,0){\includegraphics[width=\unitlength,page=1]{slas062e_volt_svg-tex.pdf}}% - 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