Add information about ws2812 driver

soc/soc.tex

@@ -113,7 +113,26 @@ The Arty development board contains an RJ-45 Ethernet jack connected to an Ether
 
 \subsection{WS2812 driver}
 
-% TODO
+A hardware driver for WS2812 serially-addressable RGB LEDs is also included in the SoC. It was developed independently as part of the curriculum at HTL and later incorporated into the SoC.
+
+\begin{figure}[h]
+\includegraphics[width=\textwidth]{ws2812.png}
+\caption{Block diagram of the WS2812 driver}
+\end{figure}
+
+\begin{figure}[h]
+\centering\includegraphics[width=0.5\textwidth]{ws2812_timing.png}
+\caption{Timing diagram for the WS2812 serial protocol}
+\label{fig:ws2812_timing}
+\end{figure}
+
+The driver is designed to be attached to external circuitry that provides color data for any given LED index (address). This can either be discrete logic that generates the color value from the address directly, or a memory that stores a separate color value for each address.
+
+The LEDs are controlled using a simple one-wire serial protocol. After a reset (long period of logic 0), the data for all LEDs is transmitted serially in one single blob. Each LED consumes and stores the first 24 bits of the stream and applies them as its color value (8 bits each for red, green, blue), all following bits are passed through unmodified. The second LED thus uses the first 24 bits of the stream it receives, but since the first LED already dropped its data, these are actually the second set of 24 bits of the source data.
+
+Every bit is encoded as a period of logic 1, followed by a period of logic 0. The timing of these sections determines the value, see \ref{fig:ws2812_timing}.
+
+The exact timing differs between models, so all periods can be customized using generics in the VHDL entity.
 
 \subsection{DRAM}
 

soc/ws2812.drawio

@@ -0,0 +1 @@
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