diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..f478d46 --- /dev/null +++ b/.gitignore @@ -0,0 +1,10 @@ +*.log +*.aux +*.synctex.gz +*.pdf +*.out + +*.o +*.ghw +*.gtkw +work-*.cf diff --git a/Diplomschrift.tex b/Diplomschrift.tex new file mode 100644 index 0000000..2d98a9d --- /dev/null +++ b/Diplomschrift.tex @@ -0,0 +1,15 @@ +\documentclass[a4paper,10pt]{article} + +\input{preamble.tex} + +\usepackage{subfiles} +\begin{document} + +\tableofcontents +\let\tableofcontents\relax + +\newpage + +\subfile{vhdl_intro/vhdl_intro.tex} + +\end{document} diff --git a/preamble.tex b/preamble.tex new file mode 100644 index 0000000..644b9e9 --- /dev/null +++ b/preamble.tex @@ -0,0 +1,62 @@ +\usepackage[utf8]{inputenc} +\usepackage{graphicx} +\usepackage{url} +\usepackage{listings} + +\lstdefinelanguage{customvhdl}[]{VHDL}{ + morekeywords=[2]{std_logic, std_logic_vector, natural, integer, bit, string}, +} + +\lstdefinestyle{default}{ + showstringspaces=false, + tabsize=4, + belowcaptionskip=1\baselineskip, + basicstyle=\footnotesize\ttfamily, + keywordstyle=\bfseries\color{green!40!black}, + commentstyle=\itshape\color{purple}, + stringstyle=\color{orange}, + breaklines=true, + xleftmargin=\parindent, + numbers=left, + title=\lstname, +} + +\lstdefinestyle{vhdlstyle}{ + style=default, + language=customvhdl, + keywordstyle=[2]\bfseries\color{blue!80!white}, + backgroundcolor=\color{lightgray!20}, + frame=lrtb, +} + +\lstset{ + style=vhdlstyle, +} + +\usepackage{titling} +\usepackage{graphicx} +\usepackage{lastpage} +\usepackage{datetime} +\yyyymmdddate +\renewcommand{\dateseparator}{-} + +\usepackage{fancyhdr} + +\usepackage{pst-uml} +\setlength{\hoffset}{30mm-1in} +\setlength{\oddsidemargin}{0pt} +\setlength{\textwidth}{\paperwidth-60mm} +\addtolength{\textheight}{5em} + +\setlength{\headwidth}{\textwidth} + +\setlength{\topmargin}{0pt} +\addtolength{\voffset}{-1em} + +\setlength{\parindent}{0px} +\setlength{\parskip}{1em} + +\usepackage{footnote} + +% loaded last +\usepackage{hyperref} diff --git a/vhdl_intro/d_flip_flop.pdf_tex b/vhdl_intro/d_flip_flop.pdf_tex new file mode 100644 index 0000000..653435a --- /dev/null +++ b/vhdl_intro/d_flip_flop.pdf_tex @@ -0,0 +1,62 @@ +%% Creator: Inkscape inkscape 0.92.4, www.inkscape.org +%% PDF/EPS/PS + LaTeX output extension by Johan Engelen, 2010 +%% Accompanies image file 'd_flip_flop.pdf' (pdf, eps, ps) +%% +%% To include the image in your LaTeX document, write +%% \input{.pdf_tex} +%% instead of +%% \includegraphics{.pdf} +%% To scale the image, write +%% \def\svgwidth{} +%% \input{.pdf_tex} +%% instead of +%% \includegraphics[width=]{.pdf} +%% +%% Images with a different path to the parent latex file can +%% be accessed with the `import' package (which may need to be +%% installed) using +%% \usepackage{import} +%% in the preamble, and then including the image with +%% \import{}{.pdf_tex} +%% Alternatively, one can specify +%% \graphicspath{{/}} +%% +%% For more information, please see info/svg-inkscape on CTAN: +%% http://tug.ctan.org/tex-archive/info/svg-inkscape +%% +\begingroup% + \makeatletter% + \providecommand\color[2][]{% + \errmessage{(Inkscape) Color is used for the text in Inkscape, but the package 'color.sty' is not loaded}% + \renewcommand\color[2][]{}% + }% + \providecommand\transparent[1]{% + \errmessage{(Inkscape) Transparency is used (non-zero) for the text in Inkscape, but the package 'transparent.sty' is not loaded}% + \renewcommand\transparent[1]{}% + }% + \providecommand\rotatebox[2]{#2}% + \newcommand*\fsize{\dimexpr\f@size pt\relax}% + \newcommand*\lineheight[1]{\fontsize{\fsize}{#1\fsize}\selectfont}% + \ifx\svgwidth\undefined% + \setlength{\unitlength}{67.5bp}% + \ifx\svgscale\undefined% + \relax% + \else% + \setlength{\unitlength}{\unitlength * \real{\svgscale}}% + \fi% + \else% + \setlength{\unitlength}{\svgwidth}% + \fi% + \global\let\svgwidth\undefined% + \global\let\svgscale\undefined% + \makeatother% + \begin{picture}(1,0.88888888)% + \lineheight{1}% + \setlength\tabcolsep{0pt}% + \put(0,0){\includegraphics[width=\unitlength,page=1]{d_flip_flop.pdf}}% + \put(0.24113854,0.61362848){\color[rgb]{0,0,0}\makebox(0,0)[lt]{\lineheight{0}\smash{\begin{tabular}[t]{l}D\end{tabular}}}}% + \put(0.76564026,0.61111112){\color[rgb]{0,0,0}\makebox(0,0)[rt]{\lineheight{0}\smash{\begin{tabular}[t]{r}Q\end{tabular}}}}% + \put(0.76472863,0.16666667){\color[rgb]{0,0,0}\makebox(0,0)[rt]{\lineheight{0}\smash{\begin{tabular}[t]{r}Q\end{tabular}}}}% + \put(0.24113854,0.16666667){\color[rgb]{0,0,0}\makebox(0,0)[lt]{\lineheight{0}\smash{\begin{tabular}[t]{l}E\end{tabular}}}}% + \end{picture}% +\endgroup% diff --git a/vhdl_intro/d_flip_flop.svg b/vhdl_intro/d_flip_flop.svg new file mode 100644 index 0000000..173783c --- /dev/null +++ b/vhdl_intro/d_flip_flop.svg @@ -0,0 +1,165 @@ + + + + + + + + + + + + + image/svg+xml + + + + + + + + + + + + + + D + Q + Q + E + + diff --git a/vhdl_intro/flipflop_gtkwave.png b/vhdl_intro/flipflop_gtkwave.png new file mode 100644 index 0000000..a849b4c Binary files /dev/null and b/vhdl_intro/flipflop_gtkwave.png differ diff --git a/vhdl_intro/vhdl/flipflop.vhd b/vhdl_intro/vhdl/flipflop.vhd new file mode 100644 index 0000000..b48e244 --- /dev/null +++ b/vhdl_intro/vhdl/flipflop.vhd @@ -0,0 +1,25 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity flipflop is + port ( + d : in std_logic; + e : in std_logic; + q : out std_logic; + q_n : out std_logic + ); +end entity; + +architecture rtl of flipflop is + signal state : std_logic; +begin + store: process(e) + begin + if rising_edge(e) then + state <= d; + end if; + end process; + + q <= state; + q_n <= not state; +end architecture; diff --git a/vhdl_intro/vhdl/flipflop_tb b/vhdl_intro/vhdl/flipflop_tb new file mode 100755 index 0000000..f101e92 Binary files /dev/null and b/vhdl_intro/vhdl/flipflop_tb differ diff --git a/vhdl_intro/vhdl/flipflop_tb.vhd b/vhdl_intro/vhdl/flipflop_tb.vhd new file mode 100644 index 0000000..dcdce40 --- /dev/null +++ b/vhdl_intro/vhdl/flipflop_tb.vhd @@ -0,0 +1,44 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity flipflop_tb is +end entity; + +architecture test of flipflop_tb is + signal s_d, s_e, s_q : std_logic; +begin + uut: entity work.flipflop + port map ( + d => s_d, + e => s_e, + q => s_q + ); + + simulate: process + begin + s_d <= '0'; + s_e <= '0'; + + wait for 100 ns; + + s_e <= '1'; + wait for 10 ns; + s_e <= '0'; + + assert s_q = '0'; + + wait for 50 ns; + s_d <= '1'; + wait for 50 ns; + + assert s_q = '0'; + + s_e <= '1'; + wait for 10 ns; + s_e <= '0'; + assert s_q = '1'; + + wait for 100 ns; + wait; + end process; +end architecture; diff --git a/vhdl_intro/vhdl_intro.tex b/vhdl_intro/vhdl_intro.tex new file mode 100644 index 0000000..f27b7e7 --- /dev/null +++ b/vhdl_intro/vhdl_intro.tex @@ -0,0 +1,52 @@ +\documentclass[../Diplomschrift.tex]{subfiles} +\begin{document} + +\part{A short introduction to VHDL} + +Designing a processor is a big task, and it's easiest to start very small. With software projects, this is usually in the form of a ``Hello World'' program - we will be designing a hardware equivalent of this. + +\section{Prerequisites} + +Other than a text editor, the following Free Software packages have to be installed: + +\begin{savenotes} +\begin{description} + \item[\texttt{ghdl}\footnote{\url{https://github.com/ghdl/ghdl}}] to compile and simulate the design + \item[\texttt{gtkwave}\footnote{\url{http://gtkwave.sourceforge.net/}}] to view the generated waveform files + \item[GNU \texttt{make}] to coordinate simulating designs, compiling firmware and generating images + \item[python] for helper scripts +\end{description} +\end{savenotes} + +\section{Creating a design} + +A simple starting design is a D flip flop: + +\def\svgwidth{2cm} +\input{d_flip_flop.pdf_tex} + +The following VHDL code describes the device: + +\lstinputlisting[title=\texttt{flipflop.vhd}]{vhdl/flipflop.vhd} + +In order to test this design, a test bench has to be created: + +\lstinputlisting[title=\texttt{flipflop\_tb.vhd}]{vhdl/flipflop_tb.vhd} + +\section{Simulating a design} + +\begin{lstlisting}[style=default,language=sh] +# analyze the design files +ghdl -a *.vhd +# elaborate the test bench entity +ghdl -e flipflop_tb +# run the test bench, saving the signal trace to a GHW file +ghdl -r flipflop_tb --wave=flipflop_tb.ghw +# open the trace with gtkwave +gtkwave flipflop_tb.ghw +\end{lstlisting} + +\begin{center} +\includegraphics[width=\textwidth]{flipflop_gtkwave.png} +\end{center} +\end{document}